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General Service Guide
2.3 Distributed processing
A system assembled from S/5 products is a multiprocessor system. All parameter modules have
their own microprocessor, which performs low-level functions such as module key control,
waveform filtering and pneumatic control, etc. At the same time the main CPU performs higher level
tasks such as trending and alarm control. While the parameter modules and CPU are performing
their tasks, the UPI (Universal Peripheral Interface) microprocessor handles all functions needed to
transfer data between the parameter modules and the CPU. At the same time the Display controller
microprocessor performs pixel calculations for graphics.
This kind of parallel processing gives one major advantage to centralized processing. When new
parameter modules or boards are added to the system, the processing power is increased. As a
result, the system does not slow down when new features are added.
2.4 Module communication
The communication master controlling data transfers between the CPU and parameter modules is
called UPI microprocessor. The UPI microprocessor sends data to each connected module 100
times a second, or 10 times per second when the parameter module is not present. Modules
respond to each data request immediately by sending a data package, which length depends on
the type of the concerned module. This communication protocol ensures that each module
receives and sends data every 10 ms. If a module does not respond to data requests, the UPI
microprocessor presumes that the module is disconnected.
Each parameter module type has a fixed address, which the UPI microprocessor uses when
sending out data. Therefore, two parameter modules of the same type must not be fitted onto the
same monitor since they would reply to a data request simultaneously thus causing
communication errors.
UPI
Processor
Shared
SRAM
Control
Logic
ISA-
BUS
Voltage
Meas
Temp
Meas
Keypad Interface
ComWheel Interface
Module Bus
Analog & Digital outputs
The UPI microprocessor collects and stores
all data that is received from the parameter
modules into a shared SRAM, which is
mapped directly to the address space of the
main CPU. The main CPU reads data from the
memory while the UPI microprocessor
guarantees that the data is up to date. This
operation also works in the other direction. In
this the main CPU fills the shared SRAM with
data and the UPI microprocessor distributes
it to the parameter modules.
Figure 3
Principle of UPI section operation
Document No. M1031508
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