When the dspstak 21262sx is programmed using the RS-232 interface, only RD & TD are used.
DTR, DSR & DCD are simply connected together and ignored by the dspstak.
The dspstak 21262sx supports standard bauds of 9600, 19.2k, 38.4k, 57.6k, 115.2k and 230.4k.
The expected protocol is No parity, 8 data bits, 1 stop bit, (N:8:1).
USB Interface
The USB interface is another way that programs may be uploaded to the dspstak. Unlike most
Analog Devices EZ-Kit development boards, the USB interface is also available for user applications.
A device driver is included with the dspstak 21262sx to support Windows 2000 & Windows XP
applications. The USB connection is made via a standard USB type B connector.
Interconnect Port
The Interconnect Port is the only standard connection between the DSP Engine and I/O Modules.
This port is described in detail in the dspstak Family Users Manual and the DAI section of this
manual.
Programmable Clocks
The dspstak 21262sx has a very flexible clock configuration. A user reprogrammable clock generator
provides the DSP clock and three I/O clocks that are available on the Interconnect Port. The three
programmable clocks on the Interconnect Port allow I/O Modules to use convenient clocks for
whatever devices that might be present. For example, an ADC might use an 18.432 MHz MCLK to
sample at 96k or a 19.6608 MHz MCLK to sample at 102.4k. In addition to the on-board
programmable clock, the DSP clock can also be provided externally by a dspstak I/O Module.
The dspstak 21262sx uses a Cypress Semiconductor CY22393 flash programmable clock generator.
This device has three PLLs which when combined with the reference oscillator can create four
independent clock frequencies. Cypress has a program called CyberClocks on their web site
(
www.cypress.com
) that you can use to create a JEDEC file to reprogram the clock chip. There are
support functions that allow this file to be uploaded via the RS-232 port. Since reprogramming
certain clocks could make the RS-232 port inoperable, the dspstak DSP Engine filters these
parameters from the JEDEC file to automatically protect the DSP Engine from unfortunate
modifications. Details on programming the clock are in the Programming the dspstak 21262sx
section of this manual.
In many cases, the factory default settings are appropriate and no changes are ever necessary.
dspstak™ 21262sx User Manual
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