Document Number: 002-10689 Rev *H
Page 133 of 166
S6J32E, S6J32F, S6J32G Series
8.4.17.4
HyperBus Read Timing (HyperRAM)
Parameter
Symbol
Pin Name
Conditions
Value
Unit
Remarks
Min
Max
HyperBus clock cycle
t
RDSCYC
G_CK,
G_RWDS
M_CK,
M_RWDS
(CL = 20 pF,
I
OL
=-10 mA,
I
OH
=10 mA),
10
-
ns
CS
↑↓ -> CK↑
Chip Select setup time
t
CSS
G_CS#_1,2
M_CS#_1,2
t
RDSCYC
-2.0
-
ns
DQ -> CK
↑↓
Setup time
t
IS
G_DQ7-0
M_DQ7-0
1.25
-
ns
CK
↑↓ -> DQ
Hold time
t
IH
G_DQ7-0
M_DQ7-0
1.25
-
ns
CK
↓ -> CS↑
Chip select hold time
t
CSH
G_CS#_1,2
M_CS#_1,2
t
RDSCYC
/2
-
ns
DQ (valid) -> RWDS
↑↓
Setup time
t
DSS
G_DQ7-0
M_DQ7-0
-0.9
-
ns
RWDS
↑↓-> DQ (invalid)
Hold time
t
DSH
G_DQ7-0
M_DQ7-0
-1.0
-
ns
CK
↑ -> RWDS↑↓
Refresh Indicator Valid
t
RIV
G_RWDS
M_RWDS
-
6
ns
CK
↑ -> RWDS(Hi-z)
Refresh Indicator Hold
t
RIH
G_RWDS
M_RWDS
0
-
ns
Note:
−
HyperBus clock cycle is always (1/F
CLK_CD1
)*4.
−
When configuring the HyperBus clock cycle, consider the HyperRAM refresh interval.
Содержание Traveo S6J32E Series
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