Application Note
36 of 42
001-65209 Rev.*I
2021-03-19
Getting Started with FX2LP™
Appendix D: Application Notes and Reference Designs
11
Appendix D: Application Notes and Reference Designs
11.1
Application Notes
•
AN15456 - Guide to Successful EZ-
USB FX1™ Hardware Design and Debug
This application note identifies possible USB hardware design issues, especially when operating at high-speed.
It also facilitates the process of catching potential problems before building a board and assists in the
debugging when getting a board up and running.
•
This application note discusses the various methods to download firmware in to FX1/FX2LP.
•
This application note describes the steps necessary to develop GPIF waveforms using the GPIF Designer.
•
This application note provides a sample project to interface an FX2LP with an FPGA. The interface implements
Hi-Speed USB connectivity for FPGA-based applications such as data acquisition, industrial control and
monitoring, and image processing. FX2LP acts in Slave-FIFO mode and the FPGA acts as the master. This
application note also gives a sample FX2LP firmware for Slave-FIFO implementation and a sample VHDL and
Verilog project for FPGA implementation.
•
AN57322 - Interfacing SRAM with FX2LP over GPIF
This application note discusses how to connect the Cypress CY7C1399B SRAM to FX2LP using the General
Programmable Interface (GPIF). It describes how to create read and write waveforms using GPIF Designer. This
application note is also useful as a reference to connect FX2LP to other SRAMs.
•
AN58009 - Serial (UART) Port Debugging of FX1/FX2LP Firmware
This application note describes the code needed in the FX2LP firmware for serial debugging. This code enables
the developer to print debug messages and real time values of variables in a PC terminal program or to capture
data in a file using the UART engine in FX2LP.
•
AN42499 - Setting Up, Using, and Troubleshooting the Keil Debugger Environment
This application note is a step-by-step beginner's guide to using the Keil Debugger. This guide covers the serial
cable connection from PC to SIO-1/0, the monitor code download, and required project settings. Additionally, it
gives guidelines to start and stop a debug session, set break points, step through code, and solve potential
problems.
•
AN4053 - Streaming Data through Isochronous/Bulk Endpoints on EZ-USBR FX2 and EZUSB FX2LP
This application note provides background information for a streaming application using the EZ-USB FX2 or the
EZ-USB FX2LP part. It provides information on streaming data through BULK endpoints, ISOCHRONOUS
endpoints, and high bandwidth ISOCHRONOUS endpoints along with design issues to consider when using the
FX2/FX2LP in high-bandwidth applications.
•
AN58069 - Implementing an 8-Bit Parallel MPEG2-TS Interface Using Slave FIFO Mode in FX2LP
This application note explains how to implement an 8-bit parallel MPEG2-TS interface using the Slave FIFO
mode. The example code uses the EZ-USB FX2LP at the receiver end and a data generator as the source for the
data stream. Hardware connections and example code are included.
