Cypress FX2LP, Начало работы

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Application Note 18 of 42 001-65209 Rev.*I
2021-03-19
Getting Started with FX2LP™
FX2LP Development Tools
Figure 16 shows the interaction between USB Control Center and the FX2LP Development Board loaded with
the bulkloop.hex file. The bulkloop firmware enumerates as a Full Speed or Hi-Speed device depending on the
PC connection and copies (loops) BULK data it receives from OUT Endpoint 2 into an IN Endpoint 6 buffer for
transmission back to the PC. As the diagram indicates, the endpoints are double-buffered, a feature
demonstrated in this section.
Note: Because USB directions are host-centric, OUT means host to device, and IN means device to host.
The bulkloop firmware also contains the code for useful operations, such as controlling the LEDS and 7-
segment readout on the FX2LP Development Board, and using endpoint interrupts. This code is examined in
detail in the
FX2LP Firmware Development section.
cyusb.sys
PC
FX2LP
EP2-OUT EP6-IN
Figure 16 USB Control Center Tests the Bulkloop Firmware
1. Expand the Bulkloop Example tree view in the Control Center to reveal the implemented BULK endpoints
(
Figure 17 ).
Figure 17 Bulkloop Example Device Internals
2. Select the Data Transfer tab. Click on the Bulk out endpoint (0x02) entry in the left-hand panel, and notice
that the Transfer Data button is Transfer Data-OUT . Clicking this button leads to the following:
•
512 bytes (with zero default values) transfer from the PC to the FX2LP DVK.
•
LED D3 flickers to indicate the OUT transfer.
•
The 7-segment readout increments to 1, indicating one packet has been received over EP2-OUT and loaded
into the EP6-IN endpoint FIFO, ready for transfer to the host.