Cypress EZ-BT WICED CYBT-343026-01, Начало работы

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Getting Started with EZ-BT WICED Modules
www.cypress.com
Document Number: 002-23400 Rev. ** 60
A list of the available I/Os and supported functionality for each I/O of CYBT-343026-01 is shown in Table 7 .
Table 7. CYBT-343026-01 Module Available Connections and Functionality
Pad Pad Name
Silicon Port Pin
Name
Functionality
UART
3
SPI
4
,
5
I2C ADC Coex
CLK/
XTAL
GPIO OTHER
1 P0/P34
PCM_Sync/I2S_
WS/P0/P34 PUART_TX/P0
PUART_RX/P34 SPI1_MOSI/P0
(master/slave) IN29/P0
IN5/P34
Yes
PCM_Sync
I2S_WS
2 I2C_SCL
I2S_DO/
PCM_Out/P3/P2
9/P35
PUART_CTS/
P3 or P35 SPI1_CLK/P3
(master/slave) SCL
SDA/P35 IN4/P35
IN10/P29
Yes (P3/P29/
P35)
I2S_DO
PCM_Out
PWM3 (P29)
3 XRES RESET_N External Reset (Active LOW)
4 I2C_SDA
PCM_IN/
I2S_DI/P12
SDA IN23/P12 Yes (P12)
PCN_IN
I2S_DI
5 P2/P37/P28
PCM_CLK/I2S_
CLK/P2/P28/P37
PUART_RX/P2
SPI1_CS/P2
(slave)
SPI1_MOSI/P2
(master)
SPI1_MISO/P37
(slave)
SCL/P37
IN11/P28
IN2/P37 ACLK1
/P37
Yes
PWM2 (P28)
I2S_CLK
PCM_CLK
6 SPI2_CS_N N/A No Connect (Used for on-module memory SPI interface for CYBT-343026-01)
7 GND GND Ground
8 SPI2_MISO N/A No Connect (Used for on-module memory SPI interface for CYBT-343026-01)
9 SPI2_MOSI N/A No Connect (Used for on-module memory SPI interface for CYBT-343026-01)
10 SPI2_CLK N/A No Connect (Used for on-module memory SPI interface for CYBT-343026-01)
11 GPIO_0
BT_GPIO_0/
P36/P38
SPI1_CLK/P36
SPI1_MOSI/P38
(master/slave)
IN3/P36
IN1/P38 ACLK0
/P36 Yes
(DevWake)
12 GPIO_1
BT_GPIO_1/
P25/P32
PUART_RX/P25
PUART_TX/P32
SPI1_MISO/P25
(master/slave)
SPI1_CS/P32
(slave)
IN7/P32
ACLK0
/P32 Yes
(HostWake)
13 GND GND No Connect (Used for on-module memory SPI interface for CYBT-343026-01)
14 GPIO_4
BT_GPIO_4/P6/
P31/LPO_IN PUART_RTS/P6
PUART_TX/P31 SPI1_CS/P6
(slave)
IN8/P31 Yes Ext LPO In
15 P4/P24
BT_CLK_REQ
6
/
P4/P24
PUART_RX/P4
PUART_TX/P24
SPI1_MOSI/P4
(master/slave)
SPI1_CLK/P24
(master/slave)
Yes
(CLK_REQ)
3
Peripheral UART operates as a default 2-wire UART interface (PUART_TX and PUART_RX). Flow control connections (RTS and
CTS) are provided, but UART flow control is not supported in hardware. Flow control operation requires logic to be completed in the
application code in order for flow control on PUART to be functional. HCI UART supports flow control in Hardware; no additional logic
is required.
4
CYBT-343026-01 contains a single SPI (SPI1) peripheral supporting both master or slave configurations. SPI2 is used for on-module
serial memory interface.
5
In Master mode, any available GPIO can be configured as SPI1_CS. This function is not explicitly shown in the table above.
6
Pad 15 of the CYBT-343026-01 module is configured to have BT_CLK_REQ set as the default. To use P4 or P24 as GPIO or other
functions, this pad must be explicitly configured to operate as a GPIO (and not BT_CLK_REQ). To do this, enter the following
declaration in the applications code to configure the port pin (recommended towards the end of the Bluetooth Application Initialization
routine):
*((volatile uint32_t*)(0x003201b8)) = 0x7000;