Contec SCP-8550-LLV, Руководство пользователя

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6. RAS Functions
SCP-8550-LLV
35
WDT_EVENT output port (4004h)
D7 D6 D5 D4 D3 D2 D1 D0
Reset WM2 WM1 WM0 R/W default: xxxx0000h
Figure 6.6. WDT_EVENT output port (4004h)
WM2 - WM0: Interrupt Output Modes
WM2 WM1 WM0 Interrupt output at occurrence of WDT errors
0 0 1 Output to IRQ5 when time expires on the WDT.
0 1 0 Output to IRQ7 when time expires on the WDT.
0 1 1 Output to IRQ9 when time expires on the WDT.
1 0 0 Output to IRQ10 when time expires on the WDT.
1 0 1 Output to IRQ11 when time expires on the WDT.
Others Inhibits output when time expires on the WDT.
Figure 6.7. WM2 - WM0: Interrupt Output Modes)
RESET: Reset Output Modes
RESET RESET output at occurrence of WDT errors
0 Inhibits RESET output when time expires on the WDT.
1 Allows RESET output when time expires on the WDT.
Figure 6.8. RESET: Reset Output Modes
CAUTION
When time expires on WDT, the alarm-out is output irrelevant to the settings of the port for
controlling event output.
RAS STATUS port (4005h)
D7 D6 D5 D4 D3 D2 D1 D0
- - - - - - - WDT R/W default: xxxxxxxxh
Figure 6.9. RAS STATUS port (4005h)
RAS Status Port (4005h)
R : RAS status port
WDT : WDT status
This is the WDT status bit. This bit is cleared when the WDT stops (read port 4002h).
0: The WDT is either stopped or counting.
1: The time set on the WDT expired.
General-purpose I/O and Remote Reset
The CPU board is equipped with three general-purpose insulated signals each for input and output. The
input signals can also be used for interrupt input or remote reset input.