4. Using the I/O Address Map
ADI16-4(FIT)GY
17
Output Port
Starting
I/O
address
D7
D6
D5
D4
D3
D2
D1
D0
Output
N/A
+0
(00h)
+1
(01h)
Interrupt Status
+2
(02h)
Enable
N/A
N/A
N/A
N/A
IRQ9
Data
IRQ7
Data
IRQ5
Data
+3
(03h)
N/A
+17
(11h)
Channel Data
+18
(12h)
N/A
N/A
N/A
N/A
N/A
N/A
Channel
Data
Channel
Data
+19
(13h)
N/A
+21
(15h)
Status Reset 0
+22
(16h)
N/A
N/A
Sampling
Clock Error
Sampling
Clock Input
N/A
N/A
N/A
N/A
Status Reset 1
+23
(17h)
N/A
N/A
N/A
FIFO
Memory
N/A
N/A
N/A
N/A
Command
+24
(18h)
Command
Data7
Command
Data6
Command
Data5
Command
Data4
Command
Data3
Command
Data2
Command
Data1
Command
Data0
+25
(19h)
N/A
+27
(1Bh)
Setting Data 0
+28
(1Ch)
Setting
Data07
Setting
Data06
Setting
Data05
Setting
Data04
Setting
Data03
Setting
Data02
Setting
Data01
Setting
Data00
Setting Data 1
+29
(1Dh)
Setting
Data15
Setting
Data14
Setting
Data13
Setting
Data12
Setting
Data11
Setting
Data10
Setting
Data09
Setting
Data08
Setting Data 2
+30
(1Eh)
Setting
Data23
Setting
Data22
Setting
Data21
Setting
Data20
Setting
Data19
Setting
Data18
Setting
Data17
Setting
Data16
Setting Data 3
+31
(1Fh)
Setting
Data31
Setting
Data30
Setting
Data29
Setting
Data28
Setting
Data27
Setting
Data26
Setting
Data25
Setting
Data24
Figure 4.2. Output port
