INS_CWGE10FX2TX8MSPOE 02/19/21 PAGE 42
INSTALLATION AND OPERATION MANUAL
CWGE10FX2TX8MSPOE
TECH SUPPORT: 1.888.678.9427
Parameter
Description
Port Status
Port
This field displays the port number.
Description
The meaningful name for the port.
Status
The field displays the detail port status if the port is blocked by some protocol.
Uptime
The sustained time from last link up.
Medium Mode
The current working medium mode, copper or fiber, for the port.
Advanced Settings
Bandwidth Control
QoS
Each egress port can support up to 8 transmit queues. Each egress transmit queue contains a
list specifying the packet transmission order. Every incoming frame is forwarded to one of the
8 egress transmit queues of the assigned egress port, based on its priority. The egress port
transmits packets from each of the 8 transmit queues according to a configurable scheduling
algorithm, which can be a combination of Weighted Fair Queuing (WFQ), Strict Priority (SP) and/or
Weighted Round Robin (WRR).
Typically, networks operate on a best-effort delivery basis, which means that all traffic has equal
priority and an equal chance of being delivered in a timely manner. When congestion occurs, all
traffic has an equal chance of being dropped.
When you configure the QoS feature, you can select specific network traffic, prioritize it according
to its relative importance, and use congestion-management and congestion-avoidance techniques
to give preferential treatment. Implementing QoS in your network makes network performance
more predictable and bandwidth utilization more effective.
The Switch supports 802.1p priority queuing. The Switch has 8 priority queues. These priority
queues are numbered from 7 (Class 7) — the highest priority queue — to 0 (Class 0) — the lowest
priority queue.
The eight priority tags specified in IEEE 802.1p (p0 to p7) are mapped to the Switch’s priority
queues as follows:
Priority
: 0 1 2 3 4 5 6 7
Queue
: 2 0 1 3 4 5 6 7
Priority scheduling is implemented by the priority queues stated above. The Switch will empty
the four hardware priority queues in order, beginning with the highest priority queue, 7, to the
lowest priority queue, 0. Each hardware queue will transmit all of the packets in its buffer before