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GRMON3-UM
June 2019, Version 3.1.0
8
www.cobham.com/gaisler
debug driver for each recognized IP core is then initialized, and performs a core-specific initialization sequence if
required. For a memory controller, the initialization sequence would typically consist of a memory probe operation
to detect the amount of attached RAM. For a UART, it could consist of initializing the baud rate generator and
flushing the FIFOs. After the initialization is complete, the system configuration is printed:
GRMON3 LEON debug monitor v3.0.0 32-bit professional version
Copyright (C) 2018 Cobham Gaisler - All rights reserved.
For latest updates, go to http://www.gaisler.com/
Comments or bug-reports to [email protected]
GRLIB build version: 4111
Detected frequency: 40 MHz
Component Vendor
LEON3 SPARC V8 Processor Cobham Gaisler
AHB Debug UART Cobham Gaisler
JTAG Debug Link Cobham Gaisler
GRSPW2 SpaceWire Serial Link Cobham Gaisler
LEON2 Memory Controller European Space Agency
AHB/APB Bridge Cobham Gaisler
LEON3 Debug Support Unit Cobham Gaisler
Generic UART Cobham Gaisler
Multi-processor Interrupt Ctrl. Cobham Gaisler
Modular Timer Unit Cobham Gaisler
General Purpose I/O port Cobham Gaisler
Use command 'info sys' to print a detailed report of attached cores
grmon3>
More detailed system information can be printed using the ‘info sys’ command as listed below. The detailed system
view also provides information about address mapping, interrupt allocation and IP core configuration. Information
about which AMBA AHB and APB buses a core is connected to can be seen by adding the
-v
option. GRMON
assigns a unique name to all cores, the core name is printed to the left. See Appendix C, Tcl API for information
about Tcl variables and device names.
grmon3> info sys
cpu0 Cobham Gaisler LEON3 SPARC V8 Processor
AHB Master 0
ahbuart0 Cobham Gaisler AHB Debug UART
AHB Master 1
APB: 80000700 - 80000800
Baudrate 115200, AHB frequency 40000000.00
ahbjtag0 Cobham Gaisler JTAG Debug Link
AHB Master 2
grspw0 Cobham Gaisler GRSPW2 SpaceWire Serial Link
AHB Master 3
APB: 80000A00 - 80000B00
IRQ: 10
Number of ports: 1
mctrl0 European Space Agency LEON2 Memory Controller
AHB: 00000000 - 20000000
AHB: 20000000 - 40000000
AHB: 40000000 - 80000000
APB: 80000000 - 80000100
8-bit prom @ 0x00000000
32-bit sdram: 1 * 64 Mbyte @ 0x40000000
col 9, cas 2, ref 7.8 us
apbmst0 Cobham Gaisler AHB/APB Bridge
AHB: 80000000 - 80100000
dsu0 Cobham Gaisler LEON3 Debug Support Unit
AHB: 90000000 - A0000000
AHB trace: 128 lines, 32-bit bus
CPU0: win 8, hwbp 2, itrace 128, V8 mul/div, srmmu, lddel 1
stack pointer 0x43fffff0
icache 2 * 4096 kB, 32 B/line lru
dcache 1 * 4096 kB, 16 B/line
uart0 Cobham Gaisler Generic UART
APB: 80000100 - 80000200
IRQ: 2
Baudrate 38461
irqmp0 Cobham Gaisler Multi-processor Interrupt Ctrl.
APB: 80000200 - 80000300
gptimer0 Cobham Gaisler Modular Timer Unit
APB: 80000300 - 80000400
IRQ: 8
8-bit scalar, 2 * 32-bit timers, divisor 40
Содержание GRMON3
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Страница 156: ...GRMON3 UM June 2019 Version 3 1 0 156 www cobham com gaisler SEE ALSO Section 6 13 On chip logic analyzer driver...
Страница 208: ...GRMON3 UM June 2019 Version 3 1 0 208 www cobham com gaisler SEE ALSO Section 3 5 Tcl integration...