6–19
1
2
3
4
5
6
ït
çi
FACSIMILE SYSTEM
Fig. 6-19 Button Detection Matrix and Control IC
To detect button input, the reference clock from the OPCNT control IC is
divided so that the state of outputs KOUT0 to KOUT7 is Low for a fixed
period of time. The duration that these outputs are Low is shifted for each
of the outputs. Inputs KIN0 to KIN7 are pulled up internally by the
OPCNT control IC to be High at all times.
Fig. 6-20 Button Detection Timing Chart 1
When the KOUT0 to KOUT7 rows become Low, one of the KIN0 to KIN7
lines becomes Low when a button is held down, and the OPCNT control
IC detects which button was pressed.
KOUT7~KOUT0
0
1
2
3
4
5
6
7
8
KIN7~KIN0
7
6
5
4
3
2
1
0
8
OPCNT
control IC
OPCNT
control IC
Divided
clock
KOUT7~KOUT0
0
1
2
3
4
5
6
7
8
8
KIN7~KIN0
7
6
5
4
3
2
1
0
+5V
KOUT0
KOUT1
KOUT2
KOUT7
L
H
L
H
L
H
L
H
Содержание 2000
Страница 36: ...1 28 Notes ...
Страница 62: ...Notes 2 26 ...
Страница 306: ...6 34 Notes ...
Страница 381: ...PRINTED IN JAPAN IMPRIME AU JAPON 0400AB0 40 0 CANON INC Printied on paper that contains 60 reused paper ...