BONFIGLIOLI Vectron Agile VABus/TCP, Руководство по связи, Страница: 56 / 72

• Transition 4’ will only be processed if Bit 4 “Voltage enabled” of the status word is
set.
• The frequency inverter can only be controlled if the logic operation is true. The logic
inputs for Start Clockwise and Start Anticlockwise can be connected directly with
“On” or “Off” (parameter
Start clockwise
68 and
Start anticlockwise
69).
Digital inputs (STOA and STOB) must be set.
This results in:
Release: = (STOA and STOB) AND (Start clockwise OR Start anticlockwise)
Status word:
The status word indicates the operating status.
Status word
State
Bit 6 Bit 5 Bit 3 Bit 2 Bit 1 Bit 0
Switch on
disabled
Quick stop
(Low
active)
Fault Operation
enabled
Switched
on
Ready to
switch on
Switch on disabled 1 X 0 0 0 0
Ready to switch on
0 1 0 0 0 1
Switched on 0 1 0 0 1 1
Operation enabled 0 1 0 1 1 1
Quick stop active 0 0 0 1 1 1
Fault reaction active
0
X
1 1 1 1
Fault 0 X 1 0 0 0
“X” means any value.
Bit 7 “Warning” can be set at any time. It reports a device-internal warning. The cause
of the warning is evaluated by reading the warning status with parameter
Warnings
270.
Bit 9 “Remote” is set if the operation mode is set to “Control via state machine” (
Lo-
cal/Remote
412 = 1) and controller release is turned on.
Bit 10 “Target reached” is set when the specified reference value is reached.
In the special case of power failure regulation, the bit is also set when the power failure
regulation reaches the frequency 0 Hz (see frequency inverter operating instructions).
For "Target reached“, there is a hysteresis (tolerance range) which can be set via the
parameter
Max. control deviation
549 see frequency inverter Operating Instructions).
Bit 11 “Internal limit value active” indicates that an internal limit is active. This may
be the current limit, the torque limit or the overvoltage control. All functions will result in
the reference value being left or not reached.
Bit 15 “Warning 2” signals a critical operating state which will result in a fault switch-off
of the frequency inverter within a short time. This bit is set if there is a delayed warning
relating to the motor temperature, heat sink/inside temperature, Ixt monitoring or mains
phase failure.
56
Agile
VABus/TCP 12/13