Basler A400K, Руководство пользователя

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Camera Interface
Basler A400k 2-25
DRAFT
pixel six in line one. Data stream D2 will transmit data for pixel seven in line one. And data
stream D3 will transmit data for pixel eight in line one.
• On the next cycle of the pixel clock, the line valid bit will be high. On this clock cycle, data
stream D0 will transmit data for pixel nine in line one. Data stream D1 will transmit data for
pixel ten in line one. Data stream D2 will transmit data for pixel eleven in line one. And data
stream D3 will transmit data for pixel twelve in line one.
• This pattern will continue until all of the pixel data for line one has been transmitted. (A total
of 588 cycles.)
• Line valid becomes low for eight pixel clocks.
• On the pixel clock cycle where data transmission for line two begins, the line valid bit will
become high. On this clock cycle, data stream D0 will transmit data for pixel one in line two.
Data stream D1 will transmit data for pixel two in line two. Data stream D2 will transmit data
for pixel three in line two. And data stream D3 will transmit data for pixel four in line two.
• On the next cycle of the pixel clock, the line valid bit will be high. On this clock cycle, data
stream D0 will transmit data for pixel five in line two. Data stream D1 will transmit data for
pixel six in line two. Data stream D2 will transmit data for pixel seven in line two. And data
stream D3 will transmit data for pixel eight in line two.
• On the next cycle of the pixel clock, the line valid bit will be high. On this clock cycle, data
stream D0 will transmit data for pixel nine in line two. Data stream D1 will transmit data for
pixel ten in line two. Data stream D2 will transmit data for pixel eleven in line two. And data
stream D3 will transmit data for pixel twelve in line two.
• This pattern will continue until all of the pixel data for line two has been transmitted. (A total of
588 cycles.)
• After all of the pixels in line two have been transmitted, the line valid bit will become low for
eight cycles indicating that valid data for line two is no longer being transmitted.
• The camera will continue to transmit pixel data for each line as described above until all of
the lines in the frame have been transmitted. After all of the lines have been transmitted, the
frame valid bit and the line valid will become low indicating that a valid frame is no longer
being transmitted.
Figure 2-10 shows the data sequence when the camera is operating in edge-controlled or level-
controlled exposure mode and Figure 2-11 shows the data sequence when the camera is
operating in programmable exposure mode.