COMPONENT DESCRIPTION AND REPLACEMENT
MULTIBUS MODULES
6 - 10
WBPEEUI220754A0
®
Figure 6-6. IIMCP01 Multibus Communication Processor
U23
SW3
LEDs
LEDs
STOP
RESET
SW4
DO1+
DO1–
P4
P5
J6
J5
J7
PORT A
PORT B
SW0
LSB
8
MSB
TP36301B
1
SW1
SW2
P6
TO IIMLM01
MSB
LSB
SW0
0 = ON OR CLOSED
1 = OFF OR OPEN
SW2
SW1
TO CPU
THROUGH
TERMINAL
SERVER
DIAGNOSTIC
PORT
DO2+
DO2–
U24
0
1
0
1
0
1
OP
E
N
123
4
5678
123
4
5678
123
4
5678
OP
E
N
OP
E
N
Table 6-6. IIMCP01 Communication Processor Configuration
Switch
Position
Description
Switch Setting
SW0
1
ROM checksumming
0 = enabled
1 = disabled
2-3
Port A characteristics
00 = 8 d, 1 s, no parity
01 = 8 d, 1 s, even parity
10 = 8 d, 1 s, odd parity
11 = 8 d, 2 s, no parity
4
Port B operation mode
0 = NIU command mode
1 = NIU utility mode