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7. Test Descriptions
Test Sequence :
1. Monitor is powered up in the quiescent state.
2. All RED channels are at AC line.
3. Redenable input is active.
4. Ra1 off.
5. Ga1 on and Ya1 on.
6. Delay 1250ms.
7. Check fault state (transfer) state of the MMU2
8. Ga1 off, Ya1 off, Ra1 on.
9. Repeat for FYA channel pairs 2 – 4.
Monitor Response to PASS
:
MMU2 must be found in the fault state in step 7.
fYa/Ga Dual Indication
(All modes except G and H)
Test Description :
Verify that the appropriate channel pairs are functioning as one four input logical channel and recognize a dual
indication condition.
Test Sequence :
1. Monitor is powered up in the quiescent state.
2. All RED channels are at AC line.
3. Redenable input is active.
4. Ra1 off.
5. Ga1 on and fYa1 flashing
6. Delay 3000ms.
7. Ga1 off, fYa1 off, Ra1 on.
8. Check fault state (transfer) state of the MMU2
9. Repeat for FYA channel pairs 2 – 4.
Monitor Response to PASS
:
MMU2 must be found in the fault state in step 8.
Ga to Ra Clearance Test
(All modes except G and H)
Test Description :
Verify that the appropriate channel pairs are functioning as one four input logical channel and recognize a short
clearance from Ga to Ra.
Test Sequence :
1. Monitor is powered up in the quiescent state.
2. All RED channels are at AC line.
3. Redenable input is active.
4. Ra1 is off and Ga1 is on.
5. Delay 1000ms.
6. Ga1 is off and Ya1 is on
7. Delay 2000ms (short clearance)
8. Ra1 is on and Ya1 is off.
9. Delay 2000ms.
10. Check fault state (transfer) state of the MMU2
11. Repeat for FYA channel pairs 2 – 4.
Monitor Response to PASS
:
MMU2 must be found in the fault state in step 10.
PCMT-8000 User's Manual
Rev. 1.7
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