1 Introduction
1 – 12
• Chapter 10, “Memory Interface,” describes the data and program
memory spaces. This chapter describes both internal and external
memory, including the use of boot memory space. A special section is
devoted to the ADSP-2181, since its memory interface differs from that
of the other family processors.
Chapter 11, “DMA Ports,” describes the operation of the ADSP-2181’s
IDMA and BDMA features.
Chapter 12, “Programming Model,” gives a functional description of the
processor resources—such as registers—as they appear in software.
Chapter 13, “Hardware Examples,” gives examples of system designs
using the ADSP-21xx processors. Each example illustrates the solution to a
different system design issue, using block diagrams, explanatory text, and
programs or timing diagrams as needed.
Chapter 14, “Software Examples,” provides illustrative code for some
important DSP and numerical algorithms.
Chapter 15, “Instruction Set Reference,” provides a detailed description of
each ADSP-21xx instruction.
The Appendices provide reference material and further details on specific
issues:
• Appendix A, “Instruction Coding,” gives the complete set of opcodes
and specifies the bit patterns for choices within each field of the
instruction word.
• Appendix B, “Division Exceptions,” describes signed and unsigned
division.
• Appendix C, “Numeric Formats,” describes the fixed-point numerical
formats directly supported by the ADSP-2100 family, discusses block
floating-point arithmetic, and tells how to handle the results of
multiplication for operands of various formats.
• Appendix D, “Interrupt Vector Addresses,” lists the interrupt vectors
of each family processor.
• Appendix E, “Control/Status Registers,” summarizes the processors’
control and status registers.
