Figure 5: Zynq Ult RFSoC DFE Block Diagram
Complex
equalizer
Mixer
& DDC
eCPRI
fr
amin
g/
de
-fr
aming
O
-RAN i
nter
face
O-RAN
user/control
plane
iFFT
DUC &
mixer
CFR
DPD
P/Q re-
sampler
Clocking
25GE
MAC PCS/PMA &
RSFEC
Prog.
channel
filter
Prog.
channel
filter
FFT
PRACH
filter &
FFT
P/Q re-
sampler
P/Q re-
sampler
Adaptable Logic Fabric
·
ORAN/CPRI/eCPRI logic
·
Non-supported use cases
·
FD & TD buffers, gain control
·
CP insertion/removal, windowing
·
DPD update, TX equalizer, TX/RX AGC
·
Timing & synchronization
·
Power meters, data capture/insertion
·
Signal statistics, debug
Calibration diagnostics
Processor Subsystem
System configuration
DPD update
DFE
DAC
DFE
ADC
DFE
ADC
DFE IP
Prog. Logic
Processor
X25919-102921
For more information on the Zynq Ult RFSoC DFE, see the
website and the Zynq Ult RFSoC DFE Data Sheet: Overview (
Encryption Key Battery Backup Circuit
The Zynq Ult RFSoC ZU67DR U1 implements bit stream encryption key technology. The
ZCU670 board provides the encryption key backup battery circuit shown in the figure below.
Chapter 3: Board Component Descriptions
UG1532 (v1.0) March 30, 2022
ZCU670 Board User Guide
23