Table 12: I2C1 TCA9548A U22 Target Device Addresses
TCA9548A U22 (Addr 0x75) Port
I2C1 Bus Device
Target Device Address
0
FMCP HSPC J28
0x##
1
USER Si570 C1 Clock U130
0X5D
2
SYSMON U1 BANK 65
0x32
3
PS DDR4 SODIMM SKT. J48
0x51
4
SFP3 P3
0x50
5
SFP2 P2
0x50
6
SFP1 P1
0x50
7
SFP0 P0
0x50
For more information on the TCA9548A, TCA6416A, and PCA9544A, see the
website.
The detailed Zynq Ult RFSoC connections for the feature described in this section are
documented in the ZCU670 board XDC file, referenced in
Appendix B: Xilinx Design Constraints
UART0 (MIO 18-19)
, callout 8]
This is the primary Zynq Ult RFSoC PS-side UART interface and is connected to the FTDI
U29 FT4232HL USB-to-Quad-UART Bridge port B through TXS0108E level-shifter U32.
The FT4232HL U29 port assignments are listed in the following table.
Table 13: FT4232HL Port Assignments
FT4232HL U29
Zynq Ult RFSoC U1
Port A JTAG
ZCU670 JTAG Chain
Port B UART0
PS_UART0 (MIO 18-19)
Port C UART2
PL_UART2 Bank 89
Port D UART3
U38 System Controller UART
The FT4232HL interface circuit connectivity is shown in the following figure.
Chapter 3: Board Component Descriptions
UG1532 (v1.0) March 30, 2022
ZCU670 Board User Guide
33