ADM-
XP
User Manual
ADM-XR-IIPro User Manual
Page 15 of 29
Version 0.2
6 Front
Panel
I/O
The XP supports standard XRM’s used on the ADM-XRC-II and ADM-XPL cards and also has an additional
connector that brings 7 MGT channels upto the XRM Module site using a differential 28 pin Samtec QSE-DP
series connector to maintain signal integrity.
The XP supports the standard Samtec 180 pin connector but using either with 2.5V or 3.3V signalling which is
globally selected using JP1
JP1 Link Posn
VCCIO – Front IO
1-2 +3V3
2-3 +2V5
6.1 Samtec 180 connector - U8
The table below details the I/O signals that are available on the Samtec 180 connector along with the FPGA
pin that each connects to.
FPGA
Pin
Signal Connector
Pins Signal FPGA
Pin
D10
IO_8N_1
1
2
IO_35N_1
C13
E10
IO_8P_1
3
4
IO_35P_1
D13
F11
IO_19N_1
5
6
IO_30P_1
H13
E11
IO_19P_1
7
8
IO_30N_1
G13
J10
IO_6N_1
9
10
IO_58N_1
M19
H10
IO_6P_1
11
12
IO_58P_1
L19
G10
IO_7N_1
13
14
IO_54N_1
L18
F10
IO_7P_1
15
16
IO_54P_1
K18
G9
IO_1P_1
17
18
IO_34P_1
E13
H9
IO_1N_1
19
20
IO_34N_1
F13
J12
IO_25N_1
21
22
IO_2N_1
E9
H12
IO_25P_1
23
24
IO_2P_1
F9
M13
IO_28N_1
25
26
IO_29P_1
K13
L13
IO_28P_1
27
28
IO_29N_1
J13
L12
IO_21N_1
29
30
IO_20P_1
C11
K12
IO_21P_1
31
32
IO_20N_1
C10
G17
IO_49N_1
33
34
IO_26N_1
F12
F17
IO_49P_1
35
36
IO_26P_1
G12
D16
IO_50P_1
37
38
IO_75P_1
F21
+3V3
39 40
IO_75N_1
G21
+3V3
41 42
Serial_ID
+3V3
43 44
Nc
+5V
45 46
Vref1 Note
1
+5V
47 48
+2V5
Vbatt
49 50
+2V5
+12V
51 52
+2V5
+12V
53 54
-12V
Presence
55 56
TDI
TCK
57 58
TRST
TMS
59 60
TDO
Note 1. Vref1 can be provided by the XRM if required and is applied to banks 0 and 1 in common.
Note 2. TCK, TMS, TDI and TDO are connected to the Coolrunner and not the V2PRO.
