Allen-Bradley 1747-PT1, Руководство пользователя

Страница: 306 / 465

Instructions
Chapter 23
Bit Shift, FIFO, and LIFO
23–7
Operation
Instruction parameters have been programmed in the FFL – FFU instruction
pair shown below.
(EN)
(DN)
(EM)
FFL
FIFO LOAD
Source
N7:10
FIFO #N7:12
Control R6:0
Length 34
Position 9
(EU)
(DN)
(EM)
FFU
FIFO UNLOAD
FIFO
#N7:12
Dest N7:11
Control R6:0
Length 34
Position 9
FFU instruction unloads
data from stack #N7:12 at
position 0, N7:12.
N7:12
0
N7:13
1
N7:14
2
3
4
5
6
7
8
9
N7:45
33
34 words are
allocated for FIFO
stack starting at
N7:12, ending at
N7:45.
FFL-FFU Instruction Pair
Loading and Unloading of Stack #N7:12
N7:10
N7:11
Position
Destination
Source
FFL instruction loads data
into stack #N7:12 at the
next available position, 9 in
this case.
FFL instruction operation
– When rung conditions change from false–to–true,
the FFL enable bit (EN) is set. This loads the contents of the Source, N7:10,
into the stack element indicated by the Position number, 9. The position
value then increments.
The FFL instruction loads an element at each false–to–true transition of the
rung, until the stack is filled (34 elements). The done bit (DN) is then set,
which inhibits further loading.
FFU instruction operation
– When rung conditions change from false–to–true,
the FFU enable bit (EU) is set. This unloads the contents of the element at
stack position 0 into the Destination, N7:11. All data in the stack is shifted
one element toward position zero, and the highest numbered element is
zeroed. The position value then decrements.
The FFU instruction unloads an element at each false–to–true transition of
the rung, until the stack is empty. The empty bit (EM) is then set.
Effects on Index Register S:24
The value present in S:24 is overwritten with the position value when a
false–to–true transition of the FFL or FFU rung occurs. For the FFL, the
position value determined at instruction entry is placed in S:24. For the FFU,
the position value determined at instruction exit is placed in S:24.
When the DN bit is set, a false–to–true transition of the FFL rung does not
change the position value or the index register value. When the EM bit is
set, a false–to–true transition of the FFU rung does not change the position
value or the index register value.