Instructions
Chapter 23
Bit Shift, FIFO, and LIFO
23–3
Entering Parameters
•
File – The address of the bit array you want to manipulate. You must use
the file indicator # in the bit array address. The address must start on an
element boundary (for example, B3:0/0, not B3:0/4).
•
Control – The instruction’s address and control (R data file) element that
stores the status byte of the instruction, the length of the array (in number
of bits), and the bit pointer (currently not used). Note: The control
address cannot be used for any other instruction.
The control element is shown below.
EN DN ER UL Not used
15 13 11 10 00
Length of bit array (number of bits)
Bit Pointer (currently not used)
Status bits of the control element:
EN (bit 15) – The enable bit is set on a false-to-true transition of the rung
and indicates the instruction is enabled.
DN (bit 13) – The done bit, when set, indicates the bit array has shifted
one position.
ER (bit 11) – The error bit, when set, indicates the instruction detected an
error such as entering a negative number for the length or position. Avoid
using the unload bit when this bit is set.
UL (bit 10) – The unload bit stores the status of the bit exited from the
array each time the instruction is enabled.
When the register shifts and input conditions go false, the enable, done,
and error bits are reset.
•
Bit Address – This is the address of the source bit that the instruction
inserts in the first bit location of the BSL array, or the last bit location of
the BSR array.
•
Length (size of bit array) (word 1) – This is the number of bits in the bit
array, up to 2048 bits. A length value of 0 causes the input bit to be
transferred to the UL bit.
A length value that points past the end of the programmed file causes a
runtime major error to occur. If you alter a length value with your ladder
program, make certain that the altered value is valid. Do not use any of
the bits beyond the last bit in the array up to the next word boundary.
They are invalid.
Effect on Index Register in SLC 5/02 Processors
The shift operation clears the index register S:24 to zero.
