ADLINK Technology NuPRO-900A, Руководство пользователя

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ePCI-X Bus Details
6.2.5 PME#
The NuPRO-900A implement PME# signal and connect it to ICH3-S.
6.3 PCI-X Bus Signals
6.3.1 Backplane Present
The a_PRSNT# and b_PRSNT# signals are connected to the super I/O chip’s
GP25 and GP26 pins respectively. These signal are pulled to +3.3V via 4.7k
resistors.
6.3.2 VIO Electrical Keying
The NuPRO-900A SHB does not monitor the VIO keying signals. Because
both Bus-A and Bus-B support PCI-66 or higher speed, the two PCI buses are
all with 3.3V signaling. The devices on the backplane to connect with the
ePCI-X buses must be 3.3V or universal PCI interface. If a application need to
support 5V only PCI cards, then a PCI-to-PCI bridge must be designed on the
backplane to isolated the 5V PCI cards behinds the bridge.
6.3.3 M66EN and PCIXCAP
The Bus-A and Bus-B support up to PCI-X 133, the M66EN and PCIXCAP of
Bus-A and Bus-B can be used to program the PCI mode.
6.3.4 REQ/GNT Signals
Both Bus-A and Bus-B provide four REQ/GNT signal pairs for bus mastering
operation.
6.4 Extended Features
The NuPRO-900A implement the FAN speed feedback signal on a reserved
ePCI-X pin: P1 A15. If user’s backplane support this feature, the backplane
should covert the FAN speed encoder feedback to 3.3V voltage level.
Note: All the ADLINK ePCI-X backplanes support this feature.