SERIES IP320 INDUSTRIAL I/O PACK 12-BIT HIGH DENSITY ANALOG INPUT BOARD
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P1 of the IP module provides the logic interface to the mating
connector on the carrier board (see Table 2.6). This connector is a
50-pin female receptacle header (AMP 173279-3 or equivalent)
which mates to the male connector of the carrier board (AMP
173280-3 or equivalent). This provides excellent connection integrity
and utilizes gold-plating in the mating area. Threaded metric M2
screws and spacers are supplied with the IP module to provide
additional stability for harsh environments (see Drawing 4501-434
for assembly details). Field and logic side connectors are keyed to
avoid incorrect assembly.
3.0 PROGRAMMING INFORMATION
ADDRESS MAPS
This board is addressable in the Industrial Pack I/O space to
control the acquistion of analog inputs from the field. The I/O space
may be as large as 64, 16-bit words (128 bytes) using address lines
A1..A6, but the IP320 only uses a portion of this space. The I/O
space address map for the IP320 is shown in Table 3.1. Note the
base address for the IP module I/O space (see your carrier board
instructions) must be added to the addresses shown to properly
access the I/O space. All accesses are performed on a 16-bit word
basis (D0..D15).
Table 3.1: IP320 I/O Space Address Memory Map
Base
A
(Hex)
Even Byte
D15 D08
Odd Byte
D07 D00
00
R/W - Control Register
02
↓
0E
Repeated Control Register
1
10
W - ADC Convert Command
12
↓
1E
Repeated ADC Convert Command
1
20
R - Read ADC Data
22
↓
2E
Repeated Read ADC Data
1
30
↓
3E
Not Used
2
40
↓
4E
Reserved
50
↓
7E
Not Used
2
Notes (Table 3.1):
1. Registers appear in multiple locations in the memory map
because of simplified address decoding (these locations can be
ignored).
2. The IP will not respond to addresses that are "Not Used".
The function of each register noted in Table 3.1 will be
discussed in the following sections.
IP Identification PROM - (Read Only, 32 odd-byte addresses)
Each IP module contains an identification (ID) PROM that
resides in the ID space per the IP module specification. This area of
memory contains 32 bytes of information at most. Both fixed and
variable information may be present within the ID PROM. Fixed
information includes the "IPAC" identifier, model number, and
manufacturer's identification codes. Variable information includes
unique information required for the module. The IP320 ID PROM
does not contain any variable (e.g. unique calibration) information.
ID PROM bytes are addressed using only the odd addresses in a 64
byte block. The IP320 ID PROM contents are shown in Table 3.2.
Note that the base-address for the IP module ID space (see your
carrier board instructions) must be added to the addresses shown to
properly access the ID PROM. Execution of an ID PROM Read
requires 0 wait states.
Table 3.2: IP320 ID Space Identification (ID) PROM
Hex Offset
From ID
PROM Base
Address
ASCII
Character
Equivalent
Numeric
Value
(Hex)
Field Description
01
I
49
All IP's have
'IPAC'
03
P
50
05
A
41
07
C
43
09
A3
Acromag ID Code
0B
32
IP Model Code
1
0D
00
Not Used
(Revision)
0F
00
Reserved
11
00
Not Used (Driver
ID Low Byte)
13
00
Not Used (Driver
ID High Byte)
15
0C
Total Number of
ID PROM Bytes
17
2E
CRC
19 to 3F
yy
Not Used
Notes (Table 3.2):
1. The IP model number is represented by a two-digit code within
the ID PROM (the IP320 model is represented by 32 Hex).
Control Register - (Read/Write, Base + 00H)
The IP320 Control Register reflects and controls analog input
channel data acquisition functions. This register must be
written/read, one word (D16) at a time. Execution of a Control
Register read (write) requires 0 (1) wait states. The function of each
bit is described as follows:
EVEN Byte
MSB
D15
D14
D13
D12
D11
D10
D09
LSB
D08
CTRIG
Not
used
Not
used
Not
used
Not
used
Not
used
MODE
1
MODE
0
