SERIES IP320 INDUSTRIAL I/O PACK 12-BIT HIGH DENSITY ANALOG INPUT BOARD
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Default Hardware Jumper Configuration
A board shipped from the factory is configured as follows:
•
Analog input range is configured for a 10V bipolar input span
(i.e. an ADC input range of -5 to +5 Volts).
•
Internal
±
12 Volt power supplies are used (sourced from P1
connector).
•
Programmable software control register bits are undefined at
reset. The control register should be programmed to the
desired gain, mode, and channel configuration before starting
ADC analog input acquisition.
Analog Input Range Hardware Jumper Configuration
The ADC input range is programmed via hardware jumpers J1
and J2. J1 controls the input voltage span. J2 controls the selection
of unipolar or bipolar input ranges. The configuration of the jumpers
for the different ranges is shown in the following table. "IN" means
that the pins are shorted together with a shorting clip. "OUT" means
that the clip has been removed.
Table 2.1: Analog Input Range Selections (Pins of J1 and J2)
Desired
ADC Input
Range (VDC)
Required
Input Span
(Volts)
J1
Pins
1&2
J1
Pins
2&3
Reqd.
Input
Type
J2
Pins
1&2
J2
Pins
2&3
-5 to +5
10
In
Out
Bipolar
Out
In
-10 to +10*
20
Out
In
Bipolar
Out
In
0 to +10*
10
In
Out
Unipolar
In
Out
* These ranges can only be achieved with
±
15V external power
supplies. The input ranges will be clipped if
±
12V supplies are
used, typically to
±
9 V maximum inputs.
Power Supply Hardware Jumper Configuration
The selection of internal or external analog power supplies is
accomplished via hardware jumpers J3 and J4. J3 (J4) controls the
selection of either the in12 (-12) Volt supply sourced from P1
connector, or the ex15 (-15) Volt supply sourced from the P2
connector. The configuration of the jumpers for the different
supplies is shown in the following table. "IN" means that the pins
are shorted together with a shorting clip. "OUT" means that the clip
has been removed.
Table 2.2: Power Supply Selections (Pins of J3 and J4)
Power Supply
Selection*
J3
(1&2)
J3
(2&3)
J4
(1&2)
J4
(2&3)
±
12 Volt (Internal, P1)
OUT
IN
OUT
IN
±
15 Volt (External, P2)
IN
OUT
IN
OUT
* Internal and external supplies should not be mixed (e.g. do not use
+12 Volts with -15 Volts).
Control Register Configuration
The control register is software configurable. There are no
hardware jumpers associated with it. Control register bits are
undefined at reset and must be programmed to the desired gain,
acquisition mode, and channel configuration, before starting ADC
analog input acquisition (refer to Section 3 for details).
Analog Input Data Format
The analog input data will appear as Unipolar Straight Binary
(USB) for unipolar input ranges (e.g. 0 to +10V); it will appear as
Bipolar Offset Binary (BOB) for bipolar input ranges (e.g. -5 to +5V).
The following tables indicate the relationship between data
format and the ideal analog input voltage to the module.
Table 2.3: Unipolar Straight Binary (USB) Analog Data Format*
Analog Input Voltage
(Volts)
USB Data
(Hex)
9.9976
FFF0
9.9951
FFE0
.
.
.
.
0.0024
0010
0.0000
0000
* For Table 2.3 it is assumed that the analog input range (unipolar)
is 0 to +10 Volts (i.e. with a programmable gain of 1). The 12-bit
USB data is left-justified within the 16-bit word. The 4 Least
Significant Bits (LSB's) are shown as zero in the table. Actually,
they are undefined and must be zeroed or ignored in calculations
made with the data returned from the IP module.
Table 2.4: Bipolar Offset Binary (BOB) Analog Data Format*
Analog Input Voltage
(Volts)
BOB Data
(Hex)
4.9976
FFF0
4.9951
FFE0
.
.
.
.
0.0024
8010
0.0000
8000
-0.0024
7FF0
.
.
.
.
-4.9976
0010
-5.0000
0000
* For Table 2.4 it is assumed that the analog input range (bipolar) is
-5 to +5 Volts (i.e. with a programmable gain of 1). The BOB, 12-
bit data is left-justified within the 16-bit word. The 4 Least
Significant Bits (LSB's) are shown as zero in the table. Actually,
they are undefined and must be zeroed or ignored in calculations
made with the data returned from the IP.
CONNECTORS
IP Field I/O Connector (P2)
P2 provides the field I/O interface connector for mating IP
modules to the carrier board. P2 is a 50-pin receptacle female
header (AMP 173279-3 or equivalent) which mates to the male
connector of the carrier board (AMP 173280-3 or equivalent). This
provides excellent connection integrity and utilizes gold-plating in the
mating area. Threaded metric M2 screws and spacers are supplied
with the module to provide additional stability for harsh environments
(see Mechanical Assembly Drawing 4501-434). The field and logic
side connectors are keyed to avoid incorrect assembly. P2 pin
assignments are unique to each IP model (see Table 2.5) and
normally correspond to the pin numbers of the front-panel, field I/O
interface connector on the carrier board (you should verify this for
your carrier board).
