background image

SERIES IP236 INDUSTRIAL I/O PACK                           FIFO BUFFERED 16 BIT ANALOG OUTPUT MODULE 
___________________________________________________________________________________________

 

- 5 - 

The board may be configured differently, depending on the 

application.  Jumper settings are discussed in the following 
sections.  The jumper locations are shown in Drawing 4501-735. 

 

Default Hardware Jumper Configuration 

 
The board is shipped from the factory, configured as follows: 

 

Each analog output range is configured for a bipolar output 
with a 20 volt span (i.e. a DAC output range of -10 to +10 
Volts). 

 

The default programmable software control register bits at 
power-up are described in section 3.  The control registers 
must be programmed to the desired mode before starting 
DAC analog output conversions. 

 

Analog Output Ranges and Corresponding Digital Codes 

 
The IP236 is designed to accept positive-true binary two’s 

complement (BTC) input codes which are compatible with bipolar 
analog output operation.  Table 2.1 indicates the relationship 
between the data format and the ideal analog output voltage for 
each of the analog output ranges. Selection of an analog output 
range is implemented via the jumper setting given in Table 2.2.  

 

Table 2.1: Full-Scale Ranges and Ideal Analog Output 

DESCRIPTION

 

Digital 

Input 
Code

 

ANALOG OUTPUT 

Output Range 

 

±

10V 

0 to 10V 

±

5V 

LSB (Least 
Significant Bit) 
Weight 

 

305

µ

153

µ

153

µ

Plus Full Scale 
Minus One LSB 

7FFF

H

 

9.999695 

Volts

 

9.999847

Volts

 

4.999847

Volts

 

Midscale 
 

0000

H

 

0V

1

 

5V

1

 

0V

1

 

One LSB Below 
Midscale 

FFFF

H

 

-305

µ

4.999847

Volts

 

-153

µ

Minus Full 
Scale 

8000

H

 

-10V 

0V 

-5V 

 
Notes (Table2.1):

 

1.   Upon power-up or software reset the bipolar ranges will 

output 0 volts while the unipolar range will output 5 volts. 

 

Analog Output Range Hardware Jumper Configuration 

 

The output range of the DACs are individually programmed 

via hardware jumpers J1 to J8.  Jumpers J1 to J8 are used to 
control channels 0 to 7, respectively.  The jumpers control the 
output voltage span and the selection of unipolar or bipolar output 
ranges.  J1 to J8 pins 1 and 2 control the selection of unipolar or 
bipolar output ranges.  J1 to J8 pins 3 and 4 control the selection 
of output voltage span.  The configuration of the jumpers for the 
different ranges is shown in Table 2.2.  “ON” means that the pins 
are shorted together with a shorting clip.  “OFF” means that the 
clip has been removed.  The individual jumper locations are 
shown in Drawing 4501-735. 
 

Table 2.2: Analog Output Range Selections/Jumper Settings 

Desired 

ADC Output 

Range (VDC) 

Output 

Span 

(Volts) 

Required 

Output 

Type 

J1 to J8 

Pins (1&2) 

 

J1 to J8 

Pins (3&4) 

 

-5 to +5 

10 

Bipolar 

ON 

ON 

-10 to +10

1

 

20 

Bipolar 

ON 

OFF 

0 to +10 

10 

Unipolar 

OFF 

ON 

 
Notes (Table2.2):

 

1.   The board is shipped with the default jumper setting for the 

±

10 volt DAC output range. 

 
Software Configuration 

 

Software configurable control registers are provided for 

control of external trigger mode, conversion mode, timer control, 
and interrupt mode selection.  No hardware jumpers are required 
for control of these functions.  These control registers must also 
be configured as desired before starting DAC analog output 
conversions.  Refer to section 3 for programming details.  
 

CONNECTORS 

 
Connectors of the IP236 module consist of one IP module 

field I/O connector, and one IP module logic connector.  These 
interface connectors are discussed in the following sections. 

 

IP Field I/O Connector (P2) 

 

P2 provides the field I/O interface connections for mating IP 

modules to the carrier board.  P2 is a 50-pin female receptacle 
header (AMP 173279-3 or equivalent) which mates to the male 
connector of the carrier board (AMP 173280-3 or equivalent).  
This provides excellent connection integrity and utilizes gold-
plating in the mating area.  Threaded metric M2 screws and 
spacers are supplied with the module to provide additional 
stability for harsh environments (see Mechanical Assembly 
Drawing 4501-434).  The field and logic side connectors are 
keyed to avoid incorrect assembly. 

 
P2 pin assignments are unique to each IP model (see Table 

2.3) and normally correspond to the pin numbers of the field I/O 
interface connector on the carrier board (you should verify this for 
your carrier board).  When reading Table 2.3 note that channel 
designations are abbreviated to save space.  For example, 
channel 0 is abbreviated as “+CH00” & “-CH00” for the + & - 
connections, respectively.  Further, note that the output signals 
all have the same ground reference (“-CH00” and the minus leads 
of all other channels are connected to analog common on the 
module). 

 

Содержание IP236 Series

Страница 1: ...Module USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road P O BOX 437 Wixom MI 48393 7037 U S A Tel 248 295 0310 Fax 248 624 9234 Copyright 1999 Acromag Inc Printed in the USA Data and specific...

Страница 2: ...IP INTERFACE LOGIC 14 CONVERSION CONTROL LOGIC 15 DATA TRANSFER FROM FPGA TO DACs 15 INTERVAL TIMER 15 EXTERNAL TRIGGER 15 INTERRUPT CONTROL LOGIC 15 CALIBRATION MEMORY CONTROL LOGIC 15 5 0 SERVICE A...

Страница 3: ...Ranges When the module s jumpers are set for bipolar operation the analog outputs are reset to 0 volts upon power up or receipt of a software or hardware reset This eliminates the problem of applying...

Страница 4: ...ODULE VxWORKS SOFTWARE Acromag provides a software product sold separately consisting of IP module VxWorks drivers This software Model IPSW API VXW MSDOS format is composed of VxWorks real time operat...

Страница 5: ...on of output voltage span The configuration of the jumpers for the different ranges is shown in Table 2 2 ON means that the pins are shorted together with a shorting clip OFF means that the clip has b...

Страница 6: ...nd grounding connections External Trigger Input Output Signals The external trigger signals on pins 42 to 49 of the P2 connector can be programmed to accept a TTL compatible external trigger input sig...

Страница 7: ...D Space Identification Format I Hex Offset From ID Base Address ASCII Character Equivalent Numeric Value Hex Field Description 01 I 49 All IP s have IPAC 03 P 50 05 A 41 07 C 43 09 A3 Acromag ID Code...

Страница 8: ...tiated 6 625 seconds after setting its corresponding Start Convert Bit Start Convert FIFO Full Status Register MSB LSB 07 06 05 04 03 02 01 00 Ch7 Ch6 Ch5 Ch4 Ch3 Ch2 Ch1 Ch0 When read this register i...

Страница 9: ...ibration Coefficient Status register is a read only register and is used to access the calibration coefficient read data and determine the status of a read cycle initiated by the Calibration Coefficie...

Страница 10: ...e wired together for all channels modules to be synchronized The External Trigger input can be sensitive to external EMI noise which can cause erroneous external triggers If External Trigger Inputs ar...

Страница 11: ...ardware reset It is recommended that interrupts be enabled for a FIFO almost empty condition 64 16 or 4 samples or less left in the FIFO Upon this interrupt no more then 128 samples minus the threshol...

Страница 12: ...board documentation for compatibility details 1 Clear the global interrupt enable bit in the carrier board status register by writing a 0 to bit 3 2 Write the interrupt vector to the IP236 Module at...

Страница 13: ...o the DAC channel to accurately generate the desired output voltage See the specification chapter for details regarding maximum calibrated error Data is corrected using a couple of formulas Equation 1...

Страница 14: ...value is rounded to 8 197 and is equivalent to DFFB hex as a 2 s complement value 6 Execute Write of DFFB hex to the Channel 0 s FIFO Buffer port at Base Address 0CH 7 Execute Write of 0001H to the S...

Страница 15: ...rnal trigger input is enabled via bit 3 of the channel s control register the falling edge of the external trigger will initiate conversions for the corresponding channel For External Trigger Input mo...

Страница 16: ...econds Power IP236 Requirements 8 8E 4 4E 5V Typical 92mA 50mA 5 Max 120mA 65mA 12V Typical 130mA 65mA 5 Max 170mA 85mA 12V Typical 160mA 82mA 5 Max 210mA 115mA ENVIRONMENTAL Operating Temperature Sta...

Страница 17: ...Bipolar Offset Error is 0 2 FSR i e 20V SPAN max Gain Error is 0 25 maximum Settling Time 10uS to within 0 003 of FSR for a 20V step change load of 5K in parallel with 500pF Conversion Rate per channe...

Страница 18: ...ndustrial I O Pack IP Each Industrial I O Pack IP has its own unique P2 pin assignments Refer to the IP module manual for correct wiring connections to the termination panel Schematic and Physical Att...

Страница 19: ...TIGHTEN 4 PLACES THE RECOMMENDED TORQUE IS 0 226 NEWTON METER OR 2 INCH POUNDS OVER TIGHTENING MAY DAMAGE CIRCUIT BOARD 2 INSERT FLAT HEAD SCREWS ITEM A THROUGH SOLDER SIDE OF IP MODULE AND INTO HEX S...

Страница 20: ...SERIES IP236 INDUSTRIAL I O PACK FIFO BUFFERED 16 BIT ANALOG OUTPUT MODULE ___________________________________________________________________________________________ 20...

Страница 21: ...SERIES IP236 INDUSTRIAL I O PACK FIFO BUFFERED 16 BIT ANALOG OUTPUT MODULE ___________________________________________________________________________________________ 21...

Страница 22: ...SERIES IP236 INDUSTRIAL I O PACK FIFO BUFFERED 16 BIT ANALOG OUTPUT MODULE ___________________________________________________________________________________________ 22...

Страница 23: ...SERIES IP236 INDUSTRIAL I O PACK FIFO BUFFERED 16 BIT ANALOG OUTPUT MODULE ___________________________________________________________________________________________ 23...

Страница 24: ...SERIES IP236 INDUSTRIAL I O PACK FIFO BUFFERED 16 BIT ANALOG OUTPUT MODULE ___________________________________________________________________________________________ 24...

Страница 25: ...SERIES IP236 INDUSTRIAL I O PACK FIFO BUFFERED 16 BIT ANALOG OUTPUT MODULE ___________________________________________________________________________________________ 25...

Страница 26: ...SERIES IP236 INDUSTRIAL I O PACK FIFO BUFFERED 16 BIT ANALOG OUTPUT MODULE ___________________________________________________________________________________________ 26...

Отзывы: