SERIES AP441 ACROPACK
USER
’S MANUAL
Acromag, Inc. Tel: 248-295-0310
- 25 -
http://www.acromag.com
- 25 -
www.acromag.com
The Effect of Reset
A power-up or bus-initiated software reset will disable event sensing and
debounce. Pull-up resistors on the I/O lines ensure a false (high) input signal
for inputs left floating (i.e. reads as 0). Further, all event inputs are reset, set
to negative events, and are disabled following reset. However, the Interrupt
Enable bit is not cleared with a software reset.
Basic Input Operation
Note that the input lines of this module are assembled in groups of eight.
Each group of eight lines is referred to as a port. Ports 0-3 control and
monitor input lines 0-31.
Each port input line is bipolar and accepts both positive and negative input
voltages in two ranges according to the model number. Individual input lines
of a port share a common signal connection with each other. Separate
commons are provided for each port to facilitate port-to-port isolation. A
high signal is derived from the absolute value of the input voltage measured
between the input line and the port common for the input ranges of 4-18V
(AP441-1 models), 16-40V (AP441-2 models), and 38-60V (AP441-3 models).
Inputs are non-inverting and inputs left floating (not recommended) will
register a low (false=0) input indication.
Each group of eight parallel input lines (a port) are isolated. A high input will
read as “1” and all inputs include hysteresis and programmable debounce.
Event Sensing
The AP441 has edge-programmable event sense logic built-in for all 32 input
lines, IN00 through IN31. Event sensing may be configured to generate an
interrupt to the carrier, or to merely reflect the interrupt internally. The
event sensing is enabled on an individual channel basis. Each input can be
set to detect positive, negative or change-of-state events. You can combine
event sensing with the built-in debounce control circuitry to obtain “glitch-
free” edge detection of incoming signals.
To program events, determine which input lines are to have events enabled,
what type of event to detect (transition or change-of-state) and which
polarity is to be detected, high-to-low level transitions (negative) or low-to-
high level transitions (positive). Set each corresponding bit to the desired
type and polarity, and then enable each of the event inputs to be detected.
Optionally, if interrupt requests are desired, enable interrupts in the
Interrupt Register. Note that all event inputs are reset, set to negative
events, and disabled after a power-up or software reset has occurred.
Debounce Control
Debounce control is built into the on-board digital FPGA employed by the
AP441. You can combine debounce with event sensing to obtain “glitch-free”
edge detection of incoming signals for all 32 channels. That is, the debounce
circuitry will automatically filter out “glitches” or transients that can occur on
received signals, for error-free edge detection and increased noise immunity.
