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SERIES AP441 ACROPACK  

USER

’S MANUAL 

 

 

 

Acromag, Inc. Tel: 248-295-0310  

            - 22 -                                   

http://www.acromag.com  

- 22 - 

www.acromag.com 

 

transitions).  Bit 0 of each register corresponds to the lowest numbered I/O 
point, while Bit 7 corresponds to the highest numbered I/O point. 

Note that no events will be detected until enabled via the Event Enable 
Register.  Further, interrupts will not be reported to the system unless the 
Interrupt enable bit-0 has been configured for enable via the Interrupt 
Register. All bits are set to “0” following a reset which means that negative 
events will be flagged by default. 

Event Pending/Clear Registers (Read/Write)  

(BAR0 + 0x0000 0048 –  
0x0000 0054) 

 

The Event Pending/Clear Registers reflect the status of the 32 possible 
interrupt channels.  A “1” bit indicates that an event flag has been set for the 
corresponding channel.  A channel that does not have events enabled will 
never set its event pending flag.  A channel’s event can be cleared by writing 
a “1” to its bit position in the Event Pending/Clear Register. Bit 0 of each 
register corresponds to the lowest numbered I/O point, while Bit 7 
corresponds to the highest numbered I/O point. 

Note that no events will be detected until enabled via the Event Enable 
Register.  Further, interrupts will not be reported to the system unless the 
Interrupt enable bit-0 has been configured for enable via the Interrupt 
Register. All bits are set to “0” following a reset. 

Debounce Control Registers (Read/Write)  

(BAR0 + 0x0000 0058 –  
0x0000 0064)  

 

These registers are used to control whether each individual channel is to be 
passed through the debounce logic before being recognized by the circuitry.  
A “0” disables the debounce logic for the corresponding channel, and a “1” 
enables the debounce logic.  Debounce applies to both inputs and event 
sense inputs.  Bit 0 of each register corresponds to the lowest numbered I/O 
point, while Bit 7 corresponds to the highest numbered I/O point. 

Furthermore, after enabling the debounce circuitry, wait at least three times 
the programmed debounce duration prior to reading the input ports or 
event signals to ensure valid data. All bits are set to “0” following a reset. 

Debounce Duration Registers (Read/Write)  

(BAR0 + 0x0000 0068 –  
0x0000 0074)   

These registers control the duration required by each input signal before it is 
recognized by each individual input.  Two bits control the debounce duration 
for each channel.  A 31.25MHz internal system clock is used for debounce. 
The debounce times are selected as shown below (actual times vary to 
within minus 25% of nominal).  

 
 
 
 
 
 

 

Содержание AcroPack AP441

Страница 1: ...erutilized and idle equipment along with credit for buybacks and trade ins Custom engineering so your equipment works exactly as you specify Critical and expedited services Leasing Rentals Demos In st...

Страница 2: ...Module With Interrupts USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road Wixom MI 48393 7037 U S A Tel 248 295 0310 Fax 248 624 9234 Copyright 2017 Acromag Inc Printed in the USA Data and spec...

Страница 3: ...Ordering Information 5 1 3 2 Key Features 5 1 3 3 Key Features PCIe Interface 6 1 4 Signal Interface Products 6 1 5 Software Support 7 Windows 7 VxWorks 7 Linux 7 1 6 References 7 2 0 PREPARATION FOR...

Страница 4: ...rs Read Write 22 Debounce Duration Registers Read Write 22 Table 3 5 Debounce Duration Register Channels 0 to 15 Channels 16 to 31 and 32 to 47 similar 23 Software Reset Register Write Only 23 XADC St...

Страница 5: ...6 3 2 Relative Humidity 32 6 3 3 Isolation 32 6 3 4 Vibration and Shock Standards 32 6 3 5 EMC Directives 32 6 4 Reliability Prediction 33 6 5 INPUTS 33 6 6 PCIe Bus Specifications 34 Table 6 6 PCIe...

Страница 6: ...ep current the information contained in this manual No part of this manual may be copied or reproduced in any form without the prior written consent of Acromag 1 2 1 Trademark Trade Name and Copyright...

Страница 7: ...o 85 C Applications requiring operating temperatures of 70 C to 85 C will require purchase of AcroPack Heatsink Accessory AP CC 01 AP CC 01 AcroPack Conduction Cool Kit See Appendix B for installation...

Страница 8: ...AP445 32 Channel Digital Output Module for direct closed loop monitoring of the output states The AP441 also shares the same pinout used on the Acromag non isolated AP408 32 Channel I O Module for cha...

Страница 9: ...Acromag provides a software product sold separately consisting of VxWorks software This software Model APSW API VXW is composed of VxWorks real time operating system libraries for all AcroPack module...

Страница 10: ...oduct near strong electrostatic electromagnetic magnetic or radioactive fields unless the device is contained within its original manufacturer s packaging Be aware that failure to comply with these gu...

Страница 11: ...ideration should be given to air filtering In a conduction cooled assembly adequate thermal conduction must be provided to prevent a temperature rise above the maximum operating temperature 2 3 Non Is...

Страница 12: ...NC 37 28 6 9 Field I O 5 12 Reserved isolation 11 Reserved isolation 4 4 7 14 Field I O 6 38 29 8 13 Field I O 7 16 Reserved isolation 15 Reserved isolation 5 5 9 18 Field I O 8 39 30 10 17 ACOM 20 Re...

Страница 13: ...O 21 52 Reserved isolation 51 Reserved isolation 14 14 27 54 Field I O 22 48 39 28 53 Field I O 23 56 Reserved isolation 55 Reserved isolation 15 15 29 58 Field I O 24 49 40 30 57 CCOM 60 Reserved iso...

Страница 14: ...42 81 NC 84 Reserved isolation 83 Reserved isolation 22 22 43 86 NC 56 47 44 85 NC 88 Reserved isolation 87 Reserved isolation 23 23 45 90 NC 57 48 46 89 NC 92 Reserved isolation 91 Reserved isolatio...

Страница 15: ...eneration and events event polarities may be defined as positive low to high or negative high to low each channel Change of State detection can also be programmed on an individual basis Field I O pino...

Страница 16: ...ould be taken in designing installations to avoid inadvertent isolation bridges noise pickup isolation voltage clearance violations equipment failure or ground loops 2 6 Logic Interface Connector The...

Страница 17: ..._RESET 1 11 REFCLK 12 N C UIM_CLK 1 9 GND 10 N C UIM_DATA 1 7 CLKREQ 8 N C UIM_PWR 1 5 TCK COEX2 1 6 N C 1 5V 1 3 TMS COEX1 1 4 GND 1 N C WAKE 1 2 3 3V3 Note 1 The following mini PCIe signals are not...

Страница 18: ...nfiguration registers A PCIe bus configuration access is used to access the AcroPack s configuration registers When the computer is first powered up the computer s system configuration software scans...

Страница 19: ...t be read to determine the interrupt request that goes active on a board interrupt request Table 3 1 Configuration Registers Reg Num D31 D24 D23 D16 D15 D8 D7 D0 0 Device ID 0x7031 AP441 1E LF 0x7032...

Страница 20: ...ers are also provided to enable interrupt generation and to generate a software reset Table 3 2 Memory Map Notes 1 The AP441 will respond to addresses that are Not Used The board will return 0 for all...

Страница 21: ...he AP module Setting this bit to logic 0 will disable board interrupts Read Write Bit 0 Disabled 1 Enabled 1 Board Interrupt Pending Status Bit This bit can be read to determine the interrupt pending...

Страница 22: ...terrupt pending status of the AP module When this bit is logic 1 an interrupt is pending and will cause an interrupt request if bit 0 of the register is set When this bit is logic 0 an interrupt is no...

Страница 23: ...an Event Sense and the board Interrupt Enable bit is set then interrupts can be generated Event Type COS or H L Configuration Registers Read Write Event Polarity Control Registers Read Write BAR0 0x0...

Страница 24: ...l be detected until enabled via the Event Enable Register Further interrupts will not be reported to the system unless the Interrupt enable bit 0 has been configured for enable via the Interrupt Regis...

Страница 25: ...upt Enable and Status register is not cleared in response to a software reset Bits 1 7 of this register are not used and will always read as zero XADC Status Control Register Read Write BAR0 0x0000 00...

Страница 26: ...a 32 bit data transfers The address value written to this register can be read on bits 22 to 16 of the XADC Status Control register at BAR0 plus 0x70H Table 3 6 System Monitor Register Map Address Sta...

Страница 27: ...high input will read as 1 and all inputs include hysteresis and programmable debounce Event Sensing The AP441 has edge programmable event sense logic built in for all 32 input lines IN00 through IN31...

Страница 28: ...e Interrupt Enable Register The event sense status is a flag that is raised when a specific change of state positive or negative transition has occurred for a given I O point while the state refers to...

Страница 29: ...y Registers are not used if change of state type events are selected If the module had been configured earlier you would first read this register to check the existing settings of event type for the o...

Страница 30: ...ld from the control logic for the AP441 Channels are isolated from each other in groups of eight There are eight channels to a group or port Because the output lines of a single port share a common co...

Страница 31: ...rt retry and disconnect The AP441 logic also implements interrupt requests via the PCIe bus A FPGA device provides the control signals required to operate the board It decodes the selected addresses c...

Страница 32: ...ry Service Procedure CAUTION POWER MUST BE TURNED OFF BEFORE SERVICING BOARDS Before beginning repair be sure that all of the procedures in the Preparation for Use section have been followed Also refe...

Страница 33: ...del Number Description Temp Range AP441 1E LF 4V to 18V DC or AC peak 40oC to 85oC1 2 AP441 2E LF 16V to 40V DC or AC peak 40oC to 85oC1 2 AP441 3E LF 38V to 60V DC or AC peak 40oC to 85oC1 2 Summariz...

Страница 34: ...voltages up to 250V r m s or DC on a continuous basis unit will withstand a 1250V AC dielectric strength test for one minute without breakdown 6 3 4 Vibration and Shock Standards The AcroPack is desig...

Страница 35: ...n used with an appropriate pullup to 5V Input Hysteresis 80mV Typical Input Capacitance 45pF Typical Turn On Time Measured to the point of positive event interrupt detection 15us Typical 25 C for a 0...

Страница 36: ...1 Line Speed Gen1 2 5Gbps Available through system connector Lane Operation 1 Lane 4K Memory Space Required One Base Address Register BAR Input Current Varies according to model number and input signa...

Страница 37: ...Bytes with data payload of 4 Bytes for a typical AcroPack For each 4 Byte data sample 24 Bytes are sent 250 24 10 4 M samples sec or 41 6 M Bytes sec or 0 332 G bit sec Note 3 For a typical AcroPack...

Страница 38: ...Tel 248 295 0310 36 http www acromag com 36 www acromag com Appendix A AP CC 01 Heatsink Kit Installation This example will show how to install the AP CC 01 Heatsink kit with an APCe7020 carrier AP CC...

Страница 39: ...K USER S MANUAL Acromag Inc Tel 248 295 0310 37 http www acromag com 37 www acromag com 1 Install two standoffs and secure with two screws 2 Install the AcroPack module 3 Install the Heatsink and secu...

Страница 40: ...S AP441 ACROPACK USER S MANUAL Acromag Inc Tel 248 295 0310 38 http www acromag com 38 www acromag com 4 AP CC 01 Installation is complete Note Make sure the thermal pad is making contact with the FPG...

Страница 41: ...SERIES AP441 ACROPACK USER S MANUAL Acromag Inc Tel 248 295 0310 39 http www acromag com 39 www acromag com Appendix B Figure 1 AP441 Block Diagram...

Страница 42: ...SERIES AP441 ACROPACK USER S MANUAL Acromag Inc Tel 248 295 0310 40 http www acromag com 40 www acromag com Figure 2 AP441 and AP445 Loopback Interconnect...

Страница 43: ...Sanitize Power Down Type SRAM SDRAM etc Size User Modifiable Yes No Function Process to Sanitize Non Volatile Memory Does this product contain Non Volatile memory i e Memory of whose contents is reta...

Страница 44: ...el 248 295 0310 42 http www acromag com 42 www acromag com Revision History The revision history for this document is summarized in the table below Release Date Version EGR DOC Description of Revision...

Страница 45: ...uipment Have surplus equipment taking up shelf space We ll give it a new home Learn more Visit us at artisantg com for more info on price quotes drivers technical specifications manuals and documentat...

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