Acer V551 (new) CRT Monitor Service Guide
Chapter 1 Engineering Specification
15
Confidence and Property
Note 1
Bit
Bit Description
7
Analog / Digital Signal Level
6
Signal Level Standard (6)
5
Signal Level Standard (5)
4 Setup
3
Sync Inputs Supported (3)
2
Sync Inputs Supported (2)
1
Sync Inputs Supported (1)
0
Sync Inputs Supported (0)
Bit Description
7
Analog / Digital Input : Defines usage of the rest if the byte as "analog input" or
digital input". Analog=0, Digital=1 . If input is described as analog, the following
definitions apply to bits 6-0. Digital is as yet undefined in the following but
provisions have been made in anticipation of a common video output standard for
Flat Panel Display (FPD) use.
6:5
Signal Level Standard (6:5) : Refer to the following bit definitions. Identified by the
level of reference white volts above blank, followed by the level of the sync tips in
volts below
blank.
Bit 6 Bit 5 Operation
0 0 0.700V/0.300V (1.000V p-p)
0 1 0.714V/0.286V (1.000V p-p)
1 0 1.000V/0.400V (1.400V p-p)
1 1 Reserved; TBD
4
Setup: If set, the display is set to expect a blank-to-black setup or pedestal per the
appropriate signal level standard.
3:0
Sync Inputs (See Bit Operation below)
3
Separate
Sync
2
Composite Sync (on H Sync line)
1
Sync on Green Video
0
Serration of the V.Sync Pulse is required when composite sync or sync-on-
green video is used