Z8
®
CPU
User Manual
UM001604-0108
Address Space
7
When instructions are executed, registers are read when defined as sources and written
when defined as destinations. All General-Purpose Registers function as accumulators,
address pointers, index registers, stack areas, or scratch pad memory.
General-Purpose Registers
General-Purpose Registers are undefined after the device is powered up. The registers
keep their last value after any reset, as long as the reset occurs in the V
CC
voltage-
specified operating range. It does not keep its last state from a V
LV
reset if V
CC
drops
below 1.8 V.
Registers in Bank
E0-EF
may only be accessed through the working register and indirect
addressing modes. Direct access cannot be used because the 4-bit working register address
mode already uses the format
[E | dst]
, where
dst
represents the working register
number from
0h
to
F
h
.
RAM Protect
The upper portion of the register file address space
80h
to
EFh
(excluding the control reg-
isters) may be protected from reading and writing. The RAM Protect bit option is mask-
programmable and is selected by the customer when the ROM code is submitted. After the
mask option is selected, activate this feature from the internal ROM code to turn OFF/on
the RAM Protect by loading either a 0 or 1 into the IMR register, bit D6. A 1 in D6 enables
RAM Protect. Only devices that use registers
80h
to
EFh
offer this feature.
Working Register Groups
Z8
®
instructions can access 8-bit registers and register pairs (16-bit words) using either
4-bit or 8-bit address fields. 8-bit address fields refer to the actual address of the register.
For example, Register
58h
is accessed by calling upon its 8-bit binary equivalent,
01011000
(
58h
).
Figure 3. Accessing Individual Bits (Example)
0 1 0 1 0 0 0 0
R15
0 1 1 1 0 0 0 0
1 1 0 1 1 1 1 1
MASK
R15
AND R15, DFh ;Clear Bit 5 of Working Register 15
Note:
