Interrupt Controller (8259A)
ICW4
The fourth Initialization Control Word (ICW4), required for all modes
of operation, is located at I/O address 21h.
It consists of the
following:
a)
Bits 0 and 3 are both logical 1s to identify the word as ICW4 for
an 8088 CPU and to denote that the hardware is configured for
buffered operation. These bits must both be set to 1 for proper
operation of the PIC on the ZT 8809A.
b)
Bit 1 programs the End-Of-Interrupt (EOI) function. Code bit 1
= logical 1 if an EOI is to be automatically executed (hardware)
as the interrupt service routine is entered. Code bit 1 = logical 0
if an EOI command is to be generated by software before
returning from the service routine.
c)
Bit 2 is set to 1, which specifies that the 8259A on the
ZT 8809A is a master PIC. This bit must be set to 1 since the
PIC on the ZT 8809A must be the master in the system.
d)
Bit 4 programs the nested or fully-nested mode. A logical 1 in
bit 4 selects special fully-nested mode.
12-15
