Xycom XVME 500, Manual

Page: 61 / 102

XVME-500/590 Manual
February, 1988
3.4.1.2
Sequential Channel Mode
In the sequential-channel mode, the module will automatically increment the channel
by one and initiate a conversion on the next channel (previous c 1). This
will occur after the low order A/D input byte (base + 87H) has been read. A
conversion can be initiated in this mode without incrementing the channel number
by writing a logic ‘1’ to bit D7 of the status/control register (by forcing a
conversion).
Procedure
1)
Write a control byte to the status/control register (base + 81H) that sets
bit D5 to logic ‘1’ and bit D6 to logic ‘0’.
2) Select a starting channel by writing the channel number to bits D0 thru
D4 of the gain/channel register (base + 85H). Assuming that the cor-
responding Gain RAM was properly initialized (programmed) after power-
up, the gain will not have to be rewritten at this time (unless a change
in gain is desired).
3)
To initiate the first conversion, write a control byte to the status/control
register that sets bit D7 to logic ‘1’.
This action will force a conversion
on the specified starting channel without incrementing the channel
number. Then, by reading the low order A/D data byte (base + 87H), the
channel number will be incremented by one; and the next conversion will
be started.
NOTE
The first conversion may also be initiated by doing a
“dummy” read of the low order
A/D
input byte. This
method, though, will increment the channel number
written to the Gain/Channel Register in step 2.
When the dummy read method is used to initiate the
first conversion, the channel offset may be corrected
by specifying a channel number (in step 2) which is
one less than the desired starting channel number
(e.g., if the first channel
for
conversion is channel 0
then channel 31 should
b e
entered as the starting
channel).
4)
Wait until the conversion is complete (i.e., check the busy flag (bit D7)
of the status/control register, or use interrupts).
5)
Read the results of the conversion from the A/D data registers -- high
byte before low byte (base + 86H before base + 87H). After the low byte
is read, a new conversion will automatically be initiated on the next
channel (previous c 1).
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