Xycom XVME 500, Manual

Page: 73 / 102

XVME-500/590 Manual
February, 1988
Table B-l. VMEbus Signal Identification (cont’d)
Signal
Mnemonic
A0l-A23
A24-A3 1
BBSY*
BCLR*
BERR*
BG0IN*-
BG3IN*
BG0OUT*-
BG3OUT*
Connector
and
Pin Number
1A:24-30
lC:15-30
2B:4-11
1B:l
lB:2
1C:ll
1 B:4,6,
8,l0
1 B:5,7,
9,ll
Signal Name and Description
ADDRESS BUS (bits 1-23): Three-state driven address
lines that specify a memory address.
ADDRESS BUS (bits 24-31): Three-state driven bus
expansion address lines.
BUS BUSY: Open-collector driven signal generated by
the current DTB master to indicate that it is using the
bus.
BUS CLEAR: Totem-pole driven signal generated by the
bus arbitrator to request release by the DTB master if
a higher level is requesting the bus.
BUS ERROR: Open-collector driven signal generated by
a slave.
It indicates that an unrecoverable error has
occurred and the bus cycle must be aborted.
BUS GRANT (0-3) IN: Totem-pole driven signals
generated by the Arbiter or Requesters. Bus Grant In
and Out signals form a daisy-chained bus grant. The
Bus Grant In signal indicates to this board that it may
become the next bus master.
BUS GRANT (0-3) OUT: Totem-pole driven signals
generated by Requesters.
These signals indicate that a
DTB master in the daisy-chain requires access to the
bus.
B-2