Xilinx ZCU1285, User Manual

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Table 13: RF-DAC Pins (cont'd)
RFSoC (U1) Net Name Tile Connector Trace Length (mils)
P5 DAC_VOUT2_229_P 229 J129 3320.982
P4 DAC_VOUT2_229_N 229 J129 3319.001
P2 DAC_VOUT3_229_P 229 J129 3163.2
P1 DAC_VOUT3_229_N 229 J129 3165.4
D4 DAC_CLK_229_P 229 J129 3556.617
C4 DAC_CLK_229_N 229 J129 3560.447
M5 DAC_VOUT0_230_P 230 J279 3267.684
M4 DAC_VOUT0_230_N 230 J279 3265.525
M2 DAC_VOUT1_230_P 230 J279 3152.804
M1 DAC_VOUT1_230_N 230 J279 3150.782
K5 DAC_VOUT2_230_P 230 J279 3287.039
K4 DAC_VOUT2_230_N 230 J279 3284.711
K2 DAC_VOUT3_230_P 230 J279 3141.679
K1 DAC_VOUT3_230_N 230 J279 3139.098
B5 DAC_CLK_230_P 230 J279 3615.019
A5 DAC_CLK_230_N 230 J279 3619.695
H5 DAC_VOUT0_231_P 231 J279 3265.511
H4 DAC_VOUT0_231_N 231 J279 3263.254
H2 DAC_VOUT1_231_P 231 J279 3111.166
H1 DAC_VOUT1_231_N 231 J279 3108.992
F5 DAC_VOUT2_231_P 231 J279 3243.78
F4 DAC_VOUT2_231_N 231 J279 3241.56
F2 DAC_VOUT3_231_P 231 J279 3071.556
F1 DAC_VOUT3_231_N 231 J279 3069.35
D6 DAC_CLK_231_P 231 J279 3834.883
C6 DAC_CLK_231_N 231 J279 3835.078
Serial Transceivers and Reference Clocks
The ZCU1285 board provides access to all GTY and PS-GTR transceiver and reference clock pins
of the RFSoC (callout 33 and 34, Figure 2: Board Component Locations ). The serial transceivers
are grouped into five sets of four TX-RX lanes, referred to as Quads. There are four GTY Quads
(Q128 –Q131), and one PS-GTR Quad (bank 505).
Chapter 1: ZCU1285 Board Features and Operation
UG1348 (v1.0) July 16, 2019 www.xilinx.com
ZCU1285 Board User Guide 32
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