Xilinx ZCU102, User Manual

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ZCU102 Evaluation Board User Guide www.xilinx.com 113
UG1182 (v1.2) March 20, 2017
Chapter 3: Board Component Descriptions
As noted in the I2C0 (MIO 14-15), page 54 , the I2C0 bus provides access to the PMBus
power controllers and PS-side and PL-side INA226 power monitors via the U60 PCA9544A
bus switch. All PMBus controlled Maxim regulators are tied to the MAXIM_PMBUS, while the
INA226 power monitors are separated on to PS_PMBUS and PL_PMBUS.
Figure 3-17, page 55 and Table 3-19, page 56 document the I2C0 bus access path to the
Maxim PMBus controllers and INA226 power monitor op amps. Also refer to schematic
0381701.
The MPSoC core related power rail measurements (PL_PMBUS) and PS related power
measurements (PS_PMBUS) are accessible to the system controller and PL logic through
their respective I2C0 bus connections. These measurements are displayed in the system
controller menu selections. The Maxim controller PMBus is also accessible by the system
controller, which can also display the rail voltage measurement made by its sourcing Maxim
controller. User IP in the PL can access the same set of PMBus resident devices through the
logic I2C0 connections.
Table 3-56: ZCU102 Power Rails with INA226 Power Monitors
Device Type Ref. Des.
PMBus
Address
Power Rail Net
Name
INA226
Address
Schematic
Page
MAX15301 U47
0x13
VCCINT PL: 0x40 60
MAX15303 U7
0x14
VCCBRAM PL: 0x41 61
MAX15303 U6
0x15
VCCAUX PL: 0x42 62
MAX15303 U10
0x16
VCC1V2 PL: 0x43 63
MAX15303 U9
0x17
VCC3V3 PL: 0x44 64
MAX15301 U63
0x18
VADJ_FMC PL: 0x45 65
MAX20751 U95
0x72
MGTAVCC PL: 0x46 67
MAX20751 U96
0x73
MGTAVTT PL: 0x47 68
MAX15301 U46
0x0A
VCCPSINTFP PS: 0x40 70
MAX15303 U4
0x0B
VCCPSINTLP PS: 0x41 71
MAX8869E U3
NA
VCCPSAUX PS: 0x42 72
MAX8869E U17
NA
VCCPSPLL PS: 0x43 73
MAX8869E U5
NA
MGTRAVCC PS: 0x44 74
MAX8869E U12
NA
MGTRAVTT PS: 0x45 75
MAX15303 U13
0x10
VCCOPS PS: 0x47 78
MAX8869E U31
NA
VCCOPS3 PS: 0x4A 79
MAX8869E U30
NA
VCCPSDDRPLL PS: 0x4B 80
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