ZC702 Board User Guide
www.xilinx.com
60
UG850 (v1.2) April 4, 2013
Feature Descriptions
Cooling Fan
The XC7Z020 AP SoC cooling fan connector J61 is wired directly to 12V
DC
as shown in
Figure 1-30
.
More information about the power system components used by the ZC702 board are
available from the Texas Instruments digital power website
[Ref 12]
.
XADC Analog-to-Digital Converter
[
Figure 1-2
, callout
26
]
The XC7Z020 AP SoC provides an Analog Front End XADC block. The XADC block includes
a dual 12-bit, 1 MSPS Analog-to-Digital Convertor (ADC) and on-chip sensors. See
UG480
,
7 Series FPGAs XADC Dual 12-Bit 1MSPS Analog-to-Digital Converter User Guide
for details
on the capabilities of the analog front end.
Figure 1-31
shows the XADC block diagram.
Table 1-33:
Power Rail Specifications for UCD9248 PMBus Controller at Address 54
Shutdown Threshold
(1)
Rail
Number
Rail
Name
Schematic
Rail Name
Nominal
V
OU
T
(V
)
PG
On T
h
re
sh
ol
d
(
V
)
PG
O
ff Thr
e
shold
(V)
On D
e
la
y
(m
s)
R
ise T
ime
(ms)
O
ff Dela
y (ms
)
Fa
ll
T
im
e
(
m
s)
V
OU
T
Ov
er F
a
ult (V)
I
OU
T
Ov
er F
a
ult
(A)
Te
m
p
O
v
e
r F
a
u
lt
(
°C
)
1
Rail #1
VCC3V3
3.3
2.97
2.805
0
5
4
1
3.795
10.41
90
2
Rail #2
VCC2V5
2.5
2.25
2.125
0
5
1
1
2.875
10.41
90
Notes:
1. The values defined in these columns are the voltage, current, and temperature thresholds that causes the regulator to shut
down if the value is exceeded.
X-Ref Target - Figure 1-30
Figure 1-30:
Cooling Fan Circuit
1
2
3
J61
GND
VCC12_P
UG850_c1_30
_030513
NC
