
VCU1525 Acceleration Platform User Guide
8
UG1268 (v1.0) November 13, 2017
Chapter 1:
Introduction
°
x4/x8 unregistered dual inline memory module (UDIMM) support
• Configuration options
°
1 gigabit (Gb) Quad Serial Peripheral Interface (SPI) flash memory
°
Micro-AB universal serial bus (USB) J13 JTAG configuration port (FT4232HQ U65
bridge)
• 76 GTY transceivers (19 Quads)
°
16-lane PCI Express (16 GTY)
°
Two QSFP28 connectors (40Gb Ethernet ports) (8 GTY)
°
52 GTY not used
• Clock sources
°
Two Si5335A Quad clock generators
°
Si570 I2C programmable LVDS clock generator
• USB-to-UART FT4232HQ bridge with Micro-AB USB connector
• PCIe integrated Endpoint block connectivity
°
Gen1, 2 or 3 x1/x2/x4/x8/x16
°
Gen4 x8
• I2C bus
• Status LEDs
• User I/O (4-pole user dual-inline package (DIP) SW3, CPU_RESET PB SW1)
• Power management with system management bus (SMBus) voltage, current, and
temperature monitoring
• Dynamic power sourcing based on external power supplied
• 75W PCIe slot functional with 35 A max V
CCINT
current PCIe slot power only
• 150 W PCIe slot functional with 110 A max V
CCINT
current PCIe slot power and 6-pin
PCIe Aux power cable connected
• 225 W PCIe slot functional with 160 A max V
CCINT
current PCIe slot power and 8-pin
PCIe Aux power cable connected
• Two QSFP28 sites capable of data rates up to 28 Gb/s
• Onboard reprogrammable flash configuration memory
• Front panel JTAG and universal asynchronous receiver-transmitter (UART) access
through the USB port
• FPGA configurable over USB/JTAG and Quad SPI configuration flash memory
• Thermal management with variable rate fan for minimal fan noise