3
PCM-A/D Programming Reference
3.1
I/O Register Definitions
The PCM-A/D uses 4 con secu tive I/O ad dresses be gin ning with a base ad dress se lected
via jumper block J8. See Sec tion 2.1 for I/O ad dress se lec tion de tails. The four al lo cated I/O
ad dresses are used as shown here :
AD DRESS
Write Reg is ter
Read Reg is ter
—————————————————————————————————————-
BASE
Chan nel Se lect
Status Reg is ter
BASE+1
Chan nel Se lect/Con ver sion Start
LSB Data
BASE+2
Con ver sion Start Only
MSB Data
BASE+3
Re served
Re served
Each Reg is ter will be ex am ined in more de tail.
3.1.1
Base Address
Write Reg is ter - Chan nel Se lect
D7 - N/A
D6 - N/A
D5 - N/A
D4 - N/A
D3 - Bit 3 of se lect nib ble
D2 - Bit 2 of se lect nib ble
D1 - Bit 1 of se lect nib ble
D0 - Bit 0 of se lect nib ble
Writ ing a value to the BASE I/O port will cause the on board mul ti plex ers to se lect a new
in put chan nel. The chan nel number se lected is the bi nary value of the lower 4 bits. No con -
ver sion is started and a de lay of ap proxi mately 6uS for mul ti plexer set tling is re quired bef -
ore be gin ning a con ver sion.
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PCM-A/D-12/16 OPERATIONS MANUAL
Page 3-1
