FOR MOBILE APPLICATIONS
W25Q256FV
- 39 -
8.2.12
Fast Read (0Bh)
The Fast Read instruction is similar to the Read Data instruction except that it can operate at the highest
possible frequency of F
R
(see AC Electrical Characteristics). This is accomplished by adding eight
“dummy” clocks after the 24/32-bit address as shown in Figure 16. The dummy clocks allow the devices
internal circuits additional time for setting up the initial address. During the dummy clocks the data value
on the DO pin is a “don’t care”.
/CS
CLK
DI
(IO
0
)
DO
(IO
1
)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (0Bh)
High Impedance
8
9
10
28
29
30
31
24-Bit Address
23
22
21
3
2
1
0
Data Out 1
*
/CS
CLK
DI
(IO
0
)
32
DO
(IO
1
)
33
34
35
36
37
38
39
Dummy Clocks
40
41
42
44
45
46
47
48
49
50
51
52
53
54
55
High Impedance
7
6
5
4
3
2
1
0
7
Data Out 2
*
7
6
5
4
3
2
1
0
*
43
31
0
= MSB
*
Figure 16a. Fast Read Instruction (SPI Mode)
32-Bit Address is required when the device is operating in 4-Byte Address Mode
