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VM1548C Theory Of Operation
97
S
ECTION
5
T
HEORY OF
O
PERATION
I
NTRODUCTION
The VM1548C TTL I/O module is a VXI message-based device consisting of six channels of
bi-directional I/O. The six channels, or ports, are configured as inputs or outputs in groups of
eight bits that can be clocked from internal or external sources. The six channels can be remotely
configured from the front panel connector I/O signal or from the VMIP module through SCPI
commands. The clocking can be from one of eight VXI TTL trigger lines, a word serial event, or
an externally supplied clock. This clocking method allows for large parallel data words to be
transmitted or received. The VM1548C contains the capability to generate a TTL trigger onto the
VXI backplane using a word serial event, one of six front panel clock inputs or from a TTL
Trigger input. By utilizing the D16 access the VM1548C can achieve data throughput rates of
4 megabytes per second (MB/s).
The VM1548C contains 22
Ω
series damping resistors on all data lines to reduce ringing during a
data transition period and a RC network of a 120
Ω
resistor in series with a 100 pF capacitor for
termination of clock lines.
All channels (0 through 5) on the VM1548C perform identically, that is all buffers are loaded the
same way, all channels are accessed the same, etc. Because of this similarity, for clarity, the
theory of operation will describe channel 0 for byte wide and channels 0 and 1 for word wide
operations.
