VXI Technology, Inc.
12
VM1548C Introduction
bus
FAIL
ACC/
ERR
J200
FAIL
ACC/
ERR
J201
FAIL
ACC/
ERR
J202
Regardless of whether the VM1548C is configured with other VM1548C modules or
with other VMIP modules, each group of 48 channels is treated as an independent
instrument in the VXIbus chassis and as such, each group has its own FAIL/POWER
and ACCESS/ERROR indicators.
F
EATURES
•
48 channels, 6 groups of 8 bits. Up to 144 channels in a single C-size card.
•
Group-wise programmable, as an input or an output, through user TTL input or VXI
A16
registers.
•
Group-wise programmable polarity through VXI A16 registers as an active high or
low.
•
Input: 0 V to 60 V, V
IN(high)
≥
2.0 V, V
IN(low)
≤
1.5 V, input impedance
≥
65 k
Ω
.
•
Output: Open collector (N-DMOS), 0 V to 60 V, up to 300 mA continuous with
over-voltage and over-current protection.
•
Data throughput: 5 µs typical system speeds, 200 kilobytes (kB) per second using
D8 access, 400 kB per second using D16 access.
•
Data Input/Output Clock Sources: For each group, from Front Panel clock input,
VXI TTL Trigger lines, or word serial event (command).
•
Capture clock edge programmable as rising edge or falling edge.
•
ASCII, Hex, Octal, and Binary data output types.
•
Message or Register based data access.
•
SCPI compatible.
F
IGURE
1-2:
F
RONT
P
ANEL
L
AYOUT
