C H A P T E R 4 F E A T U R E S
V100 Versatile Multiplexer Technical Manual Version 2.2
Page 148 of 231
4.7
Clocks
4.7.1
Port Clocks
Each data port supports the same functionality whether it is used as a tributary (DCE) or an
aggregate(DTE), the choice being defined by software. By convention, the Receive Clock “RXC” is defined
as “the clock associated with the direction of data flow from aggregate to tributary” and the Transmit
Clock “TXC” as “the clock associated with the direction of data flow from tributary to aggregate”. This
assumes that aggregate ports are normally DTE presentation and tributaries are normally DCE, so for an
aggregate, RX data is input and TX data is output whereas for a tributary, RX data is output and TX data
is input.
The RXC signal is selected from five possible modes:
(i) “EXT”:
The external interface
(ii) “TXC”:
The channel TX clock
(iii) “PLL”:
From the port’s RX Phase-locked Loop
(iv) “INT”:
The internal system clock
(v) “DBA”:
From the port’s RX PLL as (iii), but the rate can be dynamically varied
The TXC signal is also selected from the five possible modes above, with the “TXC” option replaced by
“RXC”. A block diagram of the clock logic is shown below:
