VIPA CP143 TCP/IP, Manual

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Real-time clock functions CP143
H1 / TCP/IP manual
5-18 Rev. 00/07
5.7.3 Construction of a synchronized system:
Fig. 5-9: Construction of a synchronized system
The DCF-77 module receives highly accurate time information and transfers this to the PLC. The
PLC generates a timing message that is transferred via the LAN. This message synchronizes all
CP143 modules connected to the H1-network. The real-time ICs of the different CPs maintain the
time until the next timing message is received.
5.7.4 Mechanism for assigning the master clock
No other CP can become master clock while the time transmission supplies the timing message in
accordance with the SYNC clock.
When timing messages are not received for more than the SYNC cycle time every CP will attempt
to become the master clock in accordance with the priority of its delay time. The priority of the
individual CPs is determined by means of the last byte of the ethernet address. This byte determines
the delay time before the station will attempt to become the master clock. Higher settings for this
value are equivalent to higher delay times before the station will make an attempt to acquire the
master function.
The dynamic master-CP will return to receive mode (slave) if timing messages with a higher priority
are queued or if the DCF-77 becomes active again.
Only modules where the clock init setting was master clock can become a master clock.
The DCF-77 (time transmitter) must always be assigned to the highest
priority, i.e. the last byte of the ethernet address (byte 6) should be 00h.