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VL-1225/6 Analog Input/Output Board

7-9

Physical Pin Locations

Figure 7-10. I/O Connector Physical Pin Locations

Connector Pinout

The table below shows the pinout for the analog I/O connector. See page 3-3 for detailed information.

J1 — Analog Input/Output Connector

Single Ended or

J1 Pin

Pseudo-Differential

Differential

Channel 0

Channel 0–

Channel 8

Channel 0+

Analog Ground

Channel 9

Channel 1+

Channel 1

Channel 1–

Analog Ground

Channel 2

Channel 2–

Channel 10

Channel 2+

Analog Ground

Channel 11

Channel 3+

Channel 3

Channel 3–

Analog Ground

Channel 4

Channel 4–

Channel 12

Channel 4+

Analog Ground

Channel 13

Channel 5+

Channel 5

Channel 5–

Analog Ground

Channel 6

Channel 6–

Channel 14

Channel 6+

Analog Ground

Channel 15

Channel 7+

Channel 7

Channel 7–

Analog Ground

N/C

Analog Ground

DAC0 (VL-1225 Only)

Analog Ground

DAC1 (VL-1225 Only)

Analog Ground

Figure 7-11. J1 – Analog Input/Output Connector Pinout

Reference – External Connections

Summary of Contents for STD32 VL-1225

Page 1: ...ess underutilized and idle equipment along with credit for buybacks and trade ins Custom engineering so your equipment works exactly as you specify Critical and expedited services Leasing Rentals Demos In stock Ready to ship TAR certified secure asset solutions Expert team I Trust guarantee I 100 satisfaction All trademarks brand names and brands appearing herein are the property of their respecti...

Page 2: ...0 02 NOTICE Although every effort has been made to ensure this documentation is error free VersaLogic makes no representations or warranties with respect to this product and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose VersaLogic reserves the right to revise this product and associated documentation at any time without obligation to notify ...

Page 3: ...ii VL 1225 6AnalogInput OutputBoard ...

Page 4: ...tMemoryAddressing 2 11 MEMEXSignal 2 12 AnalogInputConfiguration 2 13 InputMode 2 13 Single Ended Mode 2 13 Pseudo DifferentialMode 2 14 DifferentialMode 2 14 Current Loop Mode 2 15 Input Voltage Range 2 16 InputResolution 2 16 Input Data Format 2 17 AnalogOutputConfiguration 2 18 Output Voltage Range 2 18 Output Data Format 2 19 Output Power Up Voltage 2 20 InterruptConfiguration 2 21 3 Installat...

Page 5: ...Complement Format 4 12 InterruptRegisters 4 13 Interrupt Control Register 4 13 Interrupt Status Register 4 13 5 Operation Polled Mode Analog Input 5 1 Interrupt Mode Analog Input 5 2 AnalogOutput 5 2 6 SoftwareExamples Polled Mode Analog Input 6 1 Interrupt Mode Analog Input 6 2 AnalogOutput 6 5 7 Reference Specifications 7 1 VL 1225 Jumper Block Locations 7 2 VL 1226 Jumper Block Locations 7 4 Re...

Page 6: ...als in a single ended differential or pseudo differential configuration Each input channel can be read as desired by the system CPU The board is capable of 25 000 samples per second throughput Inadditiontotheinputchannelsnotedabove theVL 1225cardincludestwo8 bitanalogoutputchannels These channels may be jumpered for 0 to 10 5 or 10 volt output at 5 mA TheVL 1225andVL 1226areplug incompatiblewithth...

Page 7: ...ity LSB Differential Nonlinearity LSB Temperature Coefficient Gain 50 ppm C of FSR Offset 25 ppm C of FSR Addressing 16 bits MEMEX or IOEXP Mapping 8 byte memory or I O block on any 8 byte boundary Size Meets all STD 32 Bus mechanical specifications Storage Temperature 40 to 75 C Free Air Operating Temperature 0 to 65 C Power Requirements 5V 5 480 ma typ VL 1225 5V 5 430 ma typ VL 1226 ANALOGOUTPU...

Page 8: ...gs Features are selected or deselected by installing or removing the jumpers as noted The terms In or Jumpered are used to indicate an installed plug Out or Open are used to indicate a removed plug Figure 2 1 shows the jumper block locations on the VL 1225 card Figure 2 3 shows the jumper block locationsontheVL 1226card Thefiguresindicatethepositionofthejumpersasshippedfromthefactory ...

Page 9: ...2 2 VL 1225 6AnalogInput OutputBoard VL 1225 Jumper Block Locations Figure 2 1 Jumper Block Locations for VL 1225 Configuration JumperOptions ...

Page 10: ... High V911 12 In A10 decoded Low V911 12 Out A10 decoded High V10 IOEXP Select Ignore 2 10 V101 2 In V102 3 Out Ignore IOEXP V101 2 Out V102 3 Out Enable on IOEXP high V101 2 Out V102 3 In Enable on IOEXP low V11 Board Address A8 A9 8 Bit Mode Selector A8Hi A9Hi 2 6 V111 3 In V112 4 In V113 5 Out V114 6 Out 8 Bit Mode ignore A8 A9 V111 3 Out V112 4 Out V113 5 Out V114 6 Out 10 or 16 Bit Decoding A...

Page 11: ...2 4 VL 1225 6AnalogInput OutputBoard VL 1226 Jumper Block Locations Figure 2 3 Jumper Block Locations for VL 1226 Configuration JumperOptions ...

Page 12: ...t Ignore 2 10 V101 2 In V102 3 Out Ignore IOEXP V101 2 Out V102 3 Out Enable on IOEXP high V101 2 Out V102 3 In Enable on IOEXP low V11 Board Address A8 A9 8 Bit Mode Selector A8Hi A9Hi 2 6 V111 3 In V112 4 In V113 5 Out V114 6 Out 8 Bit Mode ignore A8 A9 V111 3 Out V112 4 Out V113 5 Out V114 6 Out 10 or 16 Bit Decoding A8 High A9 High V111 3 Out V112 4 Out V113 5 Out V114 6 In 10 or 16 Bit Decodi...

Page 13: ...085 6809 etc if desired I Oaddressingcanbeextended capacitydoubled usingtheIOEXPsignalwhichisdecodedbytheVL 1225 6 Memory addressing can be extended capacity doubled using the MEMEX signal which is decoded by theVL 1225 6 As shipped the board is configured for 16 bit memory addressing with a board address of hex FF08 The card occupies eight consecutive addresses i e FF08H to FF0FH The VL 1226 uses...

Page 14: ...1 2 V123 4 V125 6 V127 8 Digit V129 10 Digit X X X X 0 X 0 X X X 1 8 X X X 2 X X 3 X X X 4 X X 5 X X 6 X 7 X X X 8 X X 9 X X A X B X X C X D X E F X Jumper installed Jumper removed Jumper Jumper Jumper Jumper Jumper As As As As As Block Block Block Block Block Description Description Description Description Description Shipped Shipped Shipped Shipped Shipped V8 MEMEXSelect Ignore V9 Board Address ...

Page 15: ...114 6 Digit V121 2 V123 4 V125 6 V127 8 Digit V129 10 Digit X X 0 X X X X 0 X 0 X 1 X X X 1 8 X 2 X X X 2 3 X X 3 X X X 4 X X 5 X X 6 X 7 X X X 8 X X 9 X X A X B X X C X D X E F X Jumper installed Jumper removed Jumper Jumper Jumper Jumper Jumper As As As As As Block Block Block Block Block Description Description Description Description Description Shipped Shipped Shipped Shipped Shipped V8 MEMEX...

Page 16: ...0 X X X X 0 X X X X 0 X 0 X X X 1 X X X 1 X X X 1 8 X X X 2 X X X 2 X X X 2 X X 3 X X 3 X X 3 X X X 4 X X X 4 X X X 4 X X 5 X X 5 X X 5 X X 6 X X 6 X X 6 X 7 X 7 X 7 X X X 8 X X X 8 X X X 8 X X 9 X X 9 X X 9 X X A X X A X X A X B X B X B X X C X X C X X C X D X D X D X E X E X E F F F X Jumper installed Jumper removed Jumper Jumper Jumper Jumper Jumper As As As As As Block Block Block Block Block ...

Page 17: ...s the secondary or alternate I O map Boards that ignore or do not decode IOEXP will appear in both I O maps As shipped the IOEXP jumper is configured to ignore the IOEXP signal The board will be addressed whether the IOEXP signal is high or low It can be jumpered for two other modes as shown below Jumper Jumper Jumper Jumper Jumper As As As As As Block Block Block Block Block Description Descripti...

Page 18: ...10 Digit X X X X 0 X X X X 0 X X X X 0 X 0 X X X 1 X X X 1 X X X 1 8 X X X 2 X X X 2 X X X 2 X X 3 X X 3 X X 3 X X X 4 X X X 4 X X X 4 X X 5 X X 5 X X 5 X X 6 X X 6 X X 6 X 7 X 7 X 7 X X X 8 X X X 8 X X X 8 X X 9 X X 9 X X 9 X X A X X A X X A X B X B X B X X C X X C X X C X D X D X D X E X E X E F F F X Jumper installed Jumper removed Jumper Jumper Jumper Jumper Jumper As As As As As Block Block B...

Page 19: ...lectsthesecondaryoralternatememorymap Boardsthatignore ordonotdecode MEMEXwillappear in both memory maps As shipped the MEMEX jumper is configured to ignore the MEMEX signal The board will be addressed whether the MEMEX signal is high or low It can be jumpered for two other modes as shown below Jumper Jumper Jumper Jumper Jumper As As As As As Block Block Block Block Block Description Description ...

Page 20: ...reshowninthefiguresbelow Sincegroundloops current flowing between various equipment ground lines affect analog measurements made with reference to ground careful attention should be paid to the ground connections shown In particular the STD Bus power supply logic ground line should never be connected to earth ground when operating in the differential or pseudo differential modes Single Ended Mode ...

Page 21: ...res usually a twisted pair It is desirable to use the differential mode in electrically noisy environments since it reduces the effects of electromagnetically inducednoiseandgroundcurrents Itisespeciallyusefulineliminatingtheeffectsofcommonmodenoise generated on input lines over longer distances In the differential mode only eight input channels are available Note that in full differential operati...

Page 22: ... precision dropping resistor can be used to develop a 2 10 volt signal proportional to the 4 20 ma current This voltage is applied to the VL 1225 6 as a differential mode signal The input range shouldbejumperedforunipolar0to10Voperation Thecircuitbelowcanberepeatedforall8differential input channels Figure 2 14 Current Loop Input Mode Configuration AnalogInputConfiguration ...

Page 23: ...tage Range Select 10V V31 3 In V32 4 Out V35 7 Out V36 8 In 5V V31 3 In V32 4 Out V35 7 In V36 8 Out 10V V31 3 Out V32 4 In V35 7 Out V36 8 In 0 to 10V Figure 2 15 Input Range Selection Input Resolution The A D converter can be jumpered to provide 10 bits or 11 bits of resolution 10 bit mode is used for compatibilitywithAnalogDevicesRTI 1225 6boards itprovides1024digitalcounts 11 bitmodeprovides 2...

Page 24: ...es into positive and negative digital values See the Input Data Representation section starting on page 4 4 for further information on the various analog input data formats Input Range Valid Input Data Formats 0 to 10V Binary 10V Offset Binary or Two s Complement 5V Offset Binary or Two s Complement Figure 2 17 Valid Input Data Formats Jumper Jumper Jumper Jumper Jumper As As As As As Block Block ...

Page 25: ...Block Description Description Description Description Description Shipped Shipped Shipped Shipped Shipped V1 Channel 0 Output Voltage Range 10V V11 3 In V12 4 In 5V V11 3 In V12 4 Out 10V V11 3 Out V12 4 In 0 to 10V Figure 2 19 Channel 0 Output Voltage Range Jumper Jumper Jumper Jumper Jumper As As As As As Block Block Block Block Block Description Description Description Description Description S...

Page 26: ...Representation section starting on page 4 10 for further information on the various analog output data formats Output Range Valid Output Data Formats 5V Offset Binary or Two s Complement 10V Offset Binary or Two s Complement 0 to 10V Binary Figure 2 21 Valid Output Data Formats Jumper Jumper Jumper Jumper Jumper As As As As As Block Block Block Block Block Description Description Description Descr...

Page 27: ... As As Block Block Block Block Block Description Description Description Description Description Shipped Shipped Shipped Shipped Shipped V16 D A Power Up Output Voltage RTI 1225Compatible V161 2 In V162 3 Out Zero Volts in Two s Complement Bipolar and Binary Unipolar modes Negative Full Scale in Offset Binary Bipolar mode V161 2 Out V162 3 In Zero Volts in Offset Binary Bipolar mode Negative Full ...

Page 28: ...he dedicated slot specific signalIRQx E47 Jumper Jumper Jumper Jumper Jumper As As As As As Block Block Block Block Block Description Description Description Description Description Shipped Shipped Shipped Shipped Shipped V15 Interrupt Request Select None V151 2 Out V153 4 Out V155 6 Out V157 8 Out None V151 2 Out V153 4 Out V155 6 Out V157 8 In INT2 P50 V151 2 Out V153 4 Out V155 6 In V157 8 Out ...

Page 29: ...2 22 VL 1225 6AnalogInput OutputBoard ...

Page 30: ...lybeusedwithotherstandard TTLlevelbus STDBusboards Wheninsertingorextracting the VL 1225 6 make sure the system power is off also make sure the card is properly oriented ejector pointingup Priority Chain The VL 1225 6 card does not use the STD Bus priority interrupt chain signals PCO P51 and PCI P52 However because PCI is connected to PCO on board the card can be installed between cards using the ...

Page 31: ...ections to the VL 1225 6 can be made with standard cable assemblies or with the following mating connectors Mating Connectors Connector Mating Connector J1 34 pin socket type connectors such as 3M 3414 6634 Figure 3 1 Mating Connectors Physical Pin Locations Figure 3 2 I O Connector Physical Pin Locations Installation ExternalConnections ...

Page 32: ...C 26 Analog Ground Analog Ground 27 Analog Ground Analog Ground 28 Analog Ground Analog Ground 29 DAC0 VL 1225 Only DAC0 VL 1225 Only 30 Analog Ground Analog Ground 31 Analog Ground Analog Ground 32 DAC1 VL 1225 Only DAC1 VL 1225 Only 33 Analog Ground Analog Ground 34 Analog Ground Analog Ground Figure 3 3 J1 Analog Input Output Connector Pinout Channel 0 to 7 Analog voltages are applied to these ...

Page 33: ...se of multiple ground connections is recommended to maintain a high degree of signal integrity In differential mode a return path for the input bias currents of the on board instrumentation amplifiers must be connected to this pin This is accomplished by wiring a 10K to 100K W resistor between analog ground and the low side of each differential signal source These resistors should be located in cl...

Page 34: ... jumpered to memory address FF08H However most users configure the board using I O mapping rather than memory mapping For simplicity this manual uses the as shipped memory mapped addresses when referring to register locations If you have reconfigured the card you should substitute your own address for the FF0XH addresses indicated throughout this manual As Shipped Page Input Port Output Port Name ...

Page 35: ...terifbitD7 BUSY of IDHIGH 1 X Not Used These bits have no function in the VL 1225 6 It does not matter what value is written to them S3 S2 S1 S0 Channel Address These bits select the analog channel to use for A D conversion S3 S2 S1 S0 Selected Channel 0 0 0 0 Channel 0 0 0 0 1 Channel 1 0 0 1 0 Channel 2 0 0 1 1 Channel 3 0 1 0 0 Channel 4 0 1 0 1 Channel 5 0 1 1 0 Channel 6 0 1 1 1 Channel 7 1 0...

Page 36: ...ister The Input Data High register is a read register containing the conversion busy bit and the upper order bits of data from the A D conversion results It is used in conjunction with the Input Data Low register to read the complete 10 or 11 bit A D data word The Input Data High register should always be read before reading the Input Data Low register See the Analog Input Operation section on pag...

Page 37: ...argest code 03FFH describes the highest voltage i e 9 9902 Volts All codes are considered positive The upper six bits of the Data High register are all zeros The formulas for calculating analog or binary digital values are given by Analog Digital Analog Step Digital Step Where Analog Applied voltage Digital A D Conversion Data Step 0 00976563 Sample values are shown in the table below Input Data D...

Page 38: ...tive The upper five bits of the Data High register are all zeros The formulas for calculating analog or binary digital values are given by Analog Digital Analog Step Digital Step Where Analog Applied voltage Digital A D Conversion Data Step 0 00488281 Sample values are shown in the table below Input Data Data Voltage Hex Decimal Comment 10 0000 Out of range 9 9951 07FF 2047 Maximum voltage 5 0000 ...

Page 39: ...Analog Step Digital 1 Span Step Where Analog Applied voltage Digital A D Conversion Data Span 9 98046875 10V Range 4 99023437 5V Range Step 0 01953125 10V Range 0 00976563 5V Range Sample values are shown in the table below 5V Input 10V Input Data Data Voltage Voltage Hex Decimal Comment 5 0000 10 0000 Out of range 4 9902 9 9805 03FF 1023 Maximum positive voltage 2 5000 5 0000 0300 768 Positive ha...

Page 40: ...alog Step Digital 1 Span Step Where Analog Applied voltage Digital A D Conversion Data Span 9 99023437 10V Range 4 99511719 5V Range Step 0 00976563 10V Range 0 00488281 5V Range Sample values are shown in the table below 5V Input 10V Input Data Data Voltage Voltage Hex Decimal Comment 5 0000 10 0000 Out of range 4 9951 9 9902 07FF 2047 Maximum positive voltage 2 5000 5 0000 0600 1536 Positive hal...

Page 41: ...ressing bipolar analogs The formulas for calculating analog or two s complement digital values are given by Analog Digital Analog Step Digital Step Where Analog Applied voltage Digital A D Conversion Data Step 0 01953125 10V Range 0 00976563 5V Range Sample values are shown in the table below 5V Input 10V Input Data Data Voltage Voltage Hex Decimal Comment 5 0000 10 0000 Out of range 4 9902 9 9805...

Page 42: ...ressing bipolar analogs The formulas for calculating analog or two s complement digital values are given by Analog Digital Analog Step Digital Step Where Analog Applied voltage Digital A D Conversion Data Step 0 00976563 10V Range 0 00488281 5V Range Sample values are shown in the table below 5V Input 10V Input Data Data Voltage Voltage Hex Decimal Comment 5 0000 10 0000 Out of range 4 9951 9 9902...

Page 43: ... registers depends on the output range and the output data format that is selected Each of the data formats is discussed below OutputBinaryFormat Binary format is used only with the unipolar 0 to 10V output range Binary format divides the full 10 Volt analog output range into 256 steps of 39 06 mV each The code 00H produces an analog output of 0 Volts Thelargestcode FFH producesafullscaleanalogout...

Page 44: ...Conversion Data Span 9 921875 10V Range 4 9609375 5V Range Step 0 078125 10V Range 0 0390625 5V Range Sample values are shown in the table below 5V Output 10V Output Data Data Voltage Voltage Hex Decimal Comment 5 0000 10 0000 Out of range 4 9609 9 9219 FF 255 Maximum positive voltage 2 5000 5 0000 C0 192 Positive half scale 1 2500 2 5000 A0 160 Positive quarter scale 0 03906 0 07813 81 129 Positi...

Page 45: ... are given by Analog Digital Analog Step Digital Step Where Analog Applied voltage Digital D A Conversion Data Step 0 078125 10V Range 0 0390625 5V Range Sample values are shown in the table below 5V Output 10V Output Data Data Voltage Voltage Hex Decimal Comment 5 0000 10 0000 Out of range 4 9609 9 9219 7F 127 Maximum positive voltage 2 5000 5 0000 40 64 Positive half scale 1 2500 2 5000 20 32 Po...

Page 46: ...5 2 for further information about operating the VL 1225 6 with interrupts An interrupt software example is shown on page 6 2 InterruptStatusRegister Interrupt Status Register ISTAT FF08H 7 6 5 4 3 2 1 0 X X X X X X X IR Figure 4 16 Interrupt Status Register The Interrupt Status register is a read register used to determine the current interrupting status of the VL 1225 6board X Not Used These bits...

Page 47: ...4 14 VL 1225 6AnalogInput OutputBoard ...

Page 48: ...order data bits of the A D results Bit D7 BUSY is set to 1 when the conversion is triggered in the previous step When BUSY 0 the A D conversionhascompleted signalingthatbothInputDataHighandInputDataLowregisterscontainvalid data Since the CPU has been reading the Input Data High register in order to test the BUSY bit the upper order bits of the A D results have already been fetched from the VL 1225...

Page 49: ...her interrupt within 40 µS If the ISR does not return to the mainline program before this time delay ISRrecursionwilloccur Unlessspecialprecautionsaretaken theCPUreturnstackwilloverflow In systems with multiple non vectored interrupting devices the interrupt request status bit D0 IR of ISTAT can be read to verify that the VL 1225 6 is responsible for the interrupt See page 4 13 for further informa...

Page 50: ...idhigh equ 00305h Input Data High Register 0306 od0 equ 00306h Channel 0 Output Data Register 0307 od1 equ 00307h Channel 1 Output Data Register 0000 code segment para public CODE assume cs code 0000 read READ CHANNEL 0 INTO AX REGISTER 0000 BA 0303 mov dx select Select channel 0 and Trigger 0003 B0 00 mov al 00h 0005 EE out dx al 0006 BA 0305 mov dx idhigh Read BUSY bit and High Data 0009 EC busy...

Page 51: ...gister 0300 ictrl equ 00300h Interrupt Control Register 0303 select equ 00303h Input Channel Select Register 0304 idlow equ 00304h Input Data Low Register 0305 idhigh equ 00305h Input Data High Register 0306 od0 equ 00306h Channel 0 Output Data Register 0307 od1 equ 00307h Channel 1 Output Data Register VL 188 I O PORT ADDRESSES FF22 eoi equ 0FF22h 80188 EOI Register FF3A int1 equ 0FF3Ah 80188 INT...

Page 52: ...D8 0 Non Functional Bit D7 0 Non Functional Bit D6 0 SFNM Normal D5 0 C Non Cascade D4 1 LTM Level Trigger D3 0 MSK Non masked D2 1 PR2 Priority 7 D1 1 PR1 Priority 7 D0 1 PR0 Priority 7 Un mask STD Bus INTRQ interrupts and set to non cascade mode because VL 1225 6 does not provide interrupt vector CPU will internally generate type code 13 002E B8 R mov ax vector Install service routine address 00...

Page 53: ...complement mode only 0062 B1 06 mov cl 6 Shift count use cl 5 for 11 bit mode 0064 D3 E0 sal ax cl Shift AD10 or AD11 into bit position D7 0066 D3 F8 sar ax cl Shift it back extending sign 0068 A3 0000 R mov value ax Store results into variable 006B C7 06 0002 R FFFF mov done 0ffffh Set flag indicating that ISR has ex ecuted Additional processing code is inserted here if desired This could include...

Page 54: ...ster 0300 ictrl equ 00300h Interrupt Control Register 0303 select equ 00303h Input Channel Select Register 0304 idlow equ 00304h Input Data Low Register 0305 idhigh equ 00305h Input Data High Register 0306 od0 equ 00306h Channel 0 Output Data Register 0307 od1 equ 00307h Channel 1 Output Data Register 0000 code segment para public CODE assume cs code 0000 write OUTPUT ZERO VOLTS ON CHANNEL 1 0000 ...

Page 55: ...6 6 VL 1225 6AnalogInput OutputBoard ...

Page 56: ... Linearity LSB Differential Nonlinearity LSB Temperature Coefficient Gain 50 ppm C of FSR Offset 25 ppm C of FSR Addressing 16 bits MEMEX or IOEXP Mapping 8 byte memory or I O block on any 8 byte boundary Size Meets all STD 32 Bus mechanical specifications Storage Temperature 40 to 75 C Free Air Operating Temperature 0 to 65 C Power Requirements 5V 5 480 ma typ VL 1225 5V 5 430 ma typ VL 1226 ANAL...

Page 57: ...7 2 VL 1225 6AnalogInput OutputBoard VL 1225 Jumper Block Locations Figure 7 1 Jumper Block Locations for VL 1225 Reference VL 1225 Jumper Block Locations ...

Page 58: ...911 12 In A10 decoded Low V911 12 Out A10 decoded High V10 IOEXP Select Ignore 2 10 V101 2 In V102 3 Out Ignore IOEXP V101 2 Out V102 3 Out Enable on IOEXP high V101 2 Out V102 3 In Enable on IOEXP low V11 Board Address A8 A9 8 Bit Mode Selector A8Hi A9Hi 2 6 V111 3 In V112 4 In V113 5 Out V114 6 Out 8 Bit Mode ignore A8 A9 V111 3 Out V112 4 Out V113 5 Out V114 6 Out 10 or 16 Bit Decoding A8 High ...

Page 59: ...7 4 VL 1225 6AnalogInput OutputBoard VL 1226 Jumper Block Locations Figure 7 3 Jumper Block Locations for VL 1226 Reference VL 1226 Jumper Block Locations ...

Page 60: ...e 2 10 V101 2 In V102 3 Out Ignore IOEXP V101 2 Out V102 3 Out Enable on IOEXP high V101 2 Out V102 3 In Enable on IOEXP low V11 Board Address A8 A9 8 Bit Mode Selector A8Hi A9Hi 2 6 V111 3 In V112 4 In V113 5 Out V114 6 Out 8 Bit Mode ignore A8 A9 V111 3 Out V112 4 Out V113 5 Out V114 6 Out 10 or 16 Bit Decoding A8 High A9 High V111 3 Out V112 4 Out V113 5 Out V114 6 In 10 or 16 Bit Decoding A8 H...

Page 61: ...y mapped addresses when referring to register locations If you have reconfigured the card you should substitute your own address for the FF0XH addresses indicated throughout this manual As Shipped Input Port Output Port Name Port Address Address Page OD1 Channel 1 Output Data Register Board Address 7 FF0FH 4 10 OD0 Channel 0 Output Data Register Board Address 6 FF0EH 4 10 IDHIGH Input Data High Re...

Page 62: ... 00488281V 4 99755859V 9 99511719V 0 00244141V Using a program to continuously read the input channel adjust the Input Zero pot until the reading toggles between the two values shown in the table below 10 Bit Resolution 11 Bit Resolution Offset Two s Offset Two s Binary Binary Complement Binary Binary Complement 0000H 0000H 0200H 0000H 0000H 0400H 0001H 0001H 0201H 0001H 0001H 0401H Using the volt...

Page 63: ... G0 for channel 0 G1 for channel 1 until the GAIN output reading as indicated in the table shows on the voltmeter Repeat the above steps for channel 1 Output Range 5V 5V 10V 10V 0 to 10V Offset Two s Offset Two s Natural Binary Complement Binary Complement Binary ZERO Data 00H 80H 00H 80H 00H Output 5 000V 5 000V 10 000V 10 000V 0 000V GAIN Data FFH 7FH FFH 7FH FFH Output 4 961V 4 961V 9 922V 9 92...

Page 64: ...nel 3 11 Channel 3 Channel 3 12 Analog Ground Analog Ground 13 Channel 4 Channel 4 14 Channel 12 Channel 4 15 Analog Ground Analog Ground 16 Channel 13 Channel 5 17 Channel 5 Channel 5 18 Analog Ground Analog Ground 19 Channel 6 Channel 6 20 Channel 14 Channel 6 21 Analog Ground Analog Ground 22 Channel 15 Channel 7 23 Channel 7 Channel 7 24 Analog Ground Analog Ground 25 PD N C 26 Analog Ground A...

Page 65: ... 106 6A j 11 0B VT K 43 2B 75 4B K 107 6B k 12 0C FF L 44 2C 76 4C L 108 6C l 13 0D CR M 45 2D 77 4D M 109 6D m 14 0E SO N 46 2E 78 4E N 110 6E n 15 0F SI O 47 2F 79 4F O 111 6F o 16 10 DLE P 48 30 0 80 50 P 112 70 p 17 11 DC1 Q 49 31 1 81 51 Q 113 71 q 18 12 DC2 R 50 32 2 82 52 R 114 72 r 19 13 DC3 S 51 33 3 83 53 S 115 73 s 20 14 DC4 T 52 34 4 84 54 T 116 74 t 21 15 NAK U 53 35 5 85 55 U 117 75 ...

Page 66: ...In Address P28 A09 In Address P29 A00 In Address P30 A08 In Address P31 WR In Write Mem or I O P32 RD In Read Mem or I O P33 IORQ In I O Address Select P34 MEMRQ Memory Address Select P35 IOEXP In I O Expansion P36 BHE MEMEX In Byte High Enable Mem Expan sion P37 INTRQ1 Out Interrupt Request 1 P38 ALE Address Latch Enable P39 STATUS1 CPU Status 1 P40 STATUS0 CPU Status 0 P41 BUSAK Bus Acknowledge ...

Page 67: ...ata E40 D10 Data E41 D17 Data E42 D09 Data E43 D16 Data E44 D08 Data E45 GND Logic Ground E46 MASTER 16 Master 16 Bit E47 IRQx Out Interrupt Request E48 AENx Address Enable E49 BE1 Byte Enable 1 E50 BE3 Byte Enable 3 E51 BE0 Byte Enable 2 E52 BE2 Byte Enable 2 E53 MEM16 Memory 16 Bit E54 GND Logic Ground E55 M IO Memory or I O E56 W R Write or Read E57 DMAIOW DMA I O Write E58 DMAIOR DMA I O Read ...

Page 68: ...VL 1225 6AnalogInput OutputBoard 7 13 VL 1225 Parts Placement Diagram Figure 7 15 VL 1225 parts Placement Diagram Reference VL 1225 Parts Placement Diagram ...

Page 69: ...7 14 VL 1225 6AnalogInput OutputBoard VL 1225 Schematic 03 09 93REV3 Reference VL 1225Schematic ...

Page 70: ...VL 1225 6AnalogInput OutputBoard 7 15 VL 1225 Schematic 03 09 93REV3 Reference VL 1225Schematic ...

Page 71: ...7 16 VL 1225 6AnalogInput OutputBoard VL 1225 Schematic 03 09 93REV3 Reference VL 1225Schematic ...

Page 72: ... IntegratedCircuits IntegratedCircuits U1 U2 U3 TL081CP U4 U5 MC1408 8 U6 ADS574J U7 TL082CP U8 U9 DG408 U10 11 74HCT273 U12 U13 U20 74HCT257 U14 74HCT175 U15 74LS10 U16 U27 74LS221 U17 U18 74LS138 U19 U25 74HCT74 U21 74ACT245 U22 U23 74HCT688 U24 74LS367 U26 74ACT125 Resistors Resistors Resistors Resistors Resistors R1 R3 R7 R8 2 2K Ω 5 W R2 3 3K Ω 5 W R4 R6 49 9 Ω 1 W R5 100 Ω 1 W R9 82K Ω 5 W R...

Page 73: ...s Miscellaneous M1 5V to 15V DC DC HPR105 J1 34 pin R A header U1 U2 8 pin DIP socket U8 U9 16 pin DIP socket U6 28 pin DIP socket V1 V2 V5 V6 2 x 2 pin straight header V3 V4 V13 V15 2 x 4 pin straight header V8 V10 V16 1 x 3 pin straight header V9 2 x 6 pin straight header V7 V11 2 x 3 pin straight header V12 2 x 5 pin straight header V14 2 x 1 pin straight header Reference VL 1225 Parts List ...

Page 74: ...VL 1225 6AnalogInput OutputBoard 7 19 VL 1226 Parts Placement Diagram Figure 7 16 VL 1226 parts Placement Diagram Reference VL 1226 Parts Placement Diagram ...

Page 75: ...7 20 VL 1225 6AnalogInput OutputBoard VL 1226 Schematic 03 09 93REV3 Reference VL 1226Schematic ...

Page 76: ...VL 1225 6AnalogInput OutputBoard 7 21 VL 1226 Schematic 03 09 93REV3 Reference VL 1226Schematic ...

Page 77: ...7 22 VL 1225 6AnalogInput OutputBoard VL 1226 Schematic 03 09 93REV3 Reference VL 1226Schematic ...

Page 78: ...Circuits IntegratedCircuits IntegratedCircuits IntegratedCircuits IntegratedCircuits U3 TL081CP U6 ADS574J U7 TL082CP U8 U9 DG408 U12 U13 U20 74HCT257 U14 74HCT175 U15 74LS10 U16 U27 74LS221 U17 U18 74LS138 U25 74HCT74 U21 74ACT245 U22 U23 74HCT688 U24 74LS367 U26 74ACT125 Resistors Resistors Resistors Resistors Resistors R4 R6 49 9 Ω 1 W R5 100 Ω 1 W R9 82K Ω 5 W R10 10K Ω 1 W R11 100K Ω 5 W R12 ...

Page 79: ...iscellaneous Miscellaneous M1 5V to 15V DC DC HPR105 J1 34 pin R A header U8 U9 16 pin DIP socket U6 28 pin DIP socket V5 V6 2 x 2 pin straight header V3 V4 V13 V15 2 x 4 pin straight header V8 V10 1 x 3 pin straight header V9 2 x 6 pin straight header V11 2 x 3 pin straight header V12 2 x 5 pin straight header V14 2 x 1 pin straight header Reference VL 1226 Parts List ...

Page 80: ...quipment Have surplus equipment taking up shelf space We ll give it a new home Learn more Visit us at artisantg com for more info on price quotes drivers technical specifications manuals and documentation Artisan Scientific Corporation dba Artisan Technology Group is not an affiliate representative or authorized distributor for any manufacturer listed herein We re here to make your life easier How...

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