VL-1225/6 Analog Input/Output Board
4-1
Registers
Introduction
This section includes information about registers, control and status bits, and data formats. It focuses
primarily on the individual registers, the bits contained within them, and their functional descriptions.
Register Mapping
The VL-1225/6 occupies eight consecutive addresses in the I/O or memory map. The VL-1226 uses four
of these addresses as control, data, and status registers, the remaining four are inaccessible. The VL-1225
uses six addresses, with two inaccessible.
The locations of the eight ports are determined by the board address, which is jumper selectable. For
compatibility with Analog Devices RTI-1225/6 boards, VersaLogic ships the VL-1225/6 jumpered to
memory address FF08H. However, most users configure the board using I/O mapping rather than
memory mapping. For simplicity, this manual uses the as-shipped memory mapped addresses when
referring to register locations. If you have reconfigured the card, you should substitute your own address
for the FF0XH addresses indicated throughout this manual.
As Shipped Page
Input Port
Output Port
Name
Port Address
Address
—
OD1
Channel 1 Output Data Register
Board A 7
FF0FH
4-10
—
OD0
Channel 0 Output Data Register
Board A 6
FF0EH
4-10
IDHIGH
—
Input Data High Register
Board A 5
FF0DH
4-3
IDLOW
—
Input Data Low Register
Board A 4
FF0CH
4-3
—
SELECT
Input Channel Select Register
Board A 3
FF0BH
4-2
—
—
Not Used
Board A 2
FF0AH
—
—
—
Not Used
Board A 1
FF09H
—
ISTAT
ICTRL
Interrupt Status / Interrupt Control
Board A 0
FF08H
4-13
Figure 4-1. I/O Port Addresses
Registers
