UEi PowerDAQ PDXI-AO Series, User Manual

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Chapter 3: Architecture
24
Bits 21,22,23 when all set together are used as a Write and
Hold Flag – written to DAC’s data with this bit set will not
update output.
Bits 23, when set is used as Update All Flag – all DAC’s will
be update by previously written data.
This is the default configuration, which provides an
unlimited channel list length.
Another way to define the channel list is a series of
continuous channel numbers(1/2/4/8/16/32/64), up to the
number of ports available on the AO board, starting at any
channel. For example, the PD2-AO-32, channels 0 through
15 can be specified as a channel list of channels to be
updated in Event-based Waveform Mode and the remaining
channels can be used in Single Update Mode.
This mode is called DMA-based update mode and supports
output rates up to 1.6 MS/sec.
Note There is a dedicated function in the PowerDAQ API
called _PdAO32SetUpdateChannel which can be used to
specify the update channel number. Any write to this channel
will force the update of all DAC’s.