LISA-C2 series and FW75-C200 - System Integration Manual
UBX-13000620 - R21
Early Production Information
Design-In
Page 65 of 103
2.5.1
General precautions
The following module interfaces can have a critical influence in ESD immunity testing, depending on the
application board handling. The following precautions are suggested:
HW_SHUTDOWN pin (FW75-C200 only)
Sensitive interface is the hardware shutdown line (
HW_SHUTDOWN
pin):
•
A 47 pF bypass capacitor (e.g. Murata GRM1555C1H470JA01) have to be mounted on the line termination
connected to the
HW_SHUTDOWN
pin to avoid a module reset caused by an electrostatic discharge
applied to the application board enclosure.
•
A series ferrite bead (e.g. Murata BLM15HD182SN1) must be added on the line connected to the
HW_SHUTDOWN
pin to avoid a module reset caused by an electrostatic discharge applied to the
application board enclosure.
•
It is recommended to keep the connection line to
HW_SHUTDOWN
as short as possible.
RESET_N pin (LISA-C200 only)
Sensitive interface is the reset line (
RESET_N
pin):
•
A 47 pF bypass capacitor (e.g. Murata GRM1555C1H470JA01) have to be mounted on the line termination
connected to the
RESET_N
pin to avoid a module reset caused by an electrostatic discharge applied to the
application board enclosure.
•
A series ferrite bead (e.g. Murata BLM15HD182SN1) must be added on the line connected to the
RESET_N
pin to avoid a module reset caused by an electrostatic discharge applied to the application board enclosure.
•
It is recommended to keep the connection line to
RESET_N
as short as possible.
LISA-C200 provides an internal pull-up on the
RESET_N
pin: an open drain / collector driver is
recommended. Driving
RESET_N
high externally is NOT permitted
u-blox C200
RESET_N – LISA-C200
Reset
push button
ES
D
Open
Drain
Output
Application
Processor
u-blox C200
FB1
C1
FB2
C2
( HW_SHUTDOWN – FW75-C200)
RESET_N – LISA-C200
( HW_SHUTDOWN – FW75-C200)
Figure 37: Reset_N and HW_SHUTDOWN application circuits for ESD immunity test
