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3.3.9.6.4 SOCKET RAPL Config
PL1 Limit
Enable/Disable PL1. If this option is disabled, BIOS will program the default values
for PL1 Power Limit and PL1 Time Window.
Disabled /
Enabled
PL1 Power Limit
PL1 Power Limit in Watts. The value may vary from 0 to Fused value. If the value is
0, the fused value will be programmed. A value greater than fused TDP value will
not be programmed.
0
PL1 Time Window
PL1 value in seconds. The value may vary from 0 to 448. Indicates the time window
over which TDP value should be maintained. If the value is 0, the fused value will
be programmed.
1
Summary of Contents for S7126
Page 2: ...http www tyan com 2...
Page 8: ...http www tyan com 8 NOTE...
Page 11: ...http www tyan com 11 2 2 Block Diagram S7126 Block Diagram...
Page 12: ...http www tyan com 12 2 3 Mainboard Mechanical Drawing...
Page 34: ...http www tyan com 34...
Page 40: ...http www tyan com 40 DIMM Location...
Page 79: ...http www tyan com 79 Numa Enable or Disable Non uniform Memory Access NUMA Disabled Enabled...
Page 83: ...http www tyan com 83 3 3 9 3 1 1 UPI Status Read only...
Page 96: ...http www tyan com 96 3 3 9 5 4 Intel VMD Technology...
Page 98: ...http www tyan com 98 VMD Config for IOU4 Enable Disable VMD in this Stack Disabled Enabled...
Page 104: ...http www tyan com 104 Perf P Limit Enable Disable Performance P Limit Disabled Enabled...
Page 109: ...http www tyan com 109 3 3 10 Memory Topology Read only...
Page 120: ...http www tyan com 120 Max Payload Size PCIE Max Payload Size Selection MPL128B MPL256B...
Page 131: ...http www tyan com 131 NMI Button Enable or Disable NMI button Enabled Disabled...
Page 208: ...http www tyan com 208 BIOS Temp Sensor Name Explanation...
Page 209: ...http www tyan com 209...
Page 212: ...http www tyan com 212 NOTE...
Page 215: ...http www tyan com 215 4 The installation of the M 2 latch is now complete...
Page 216: ...http www tyan com 216 NOTE...