Patton electronics 3040/V35 User Manual Download

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Doc #: 139001UA

Part #: 07M3040-A

D

IGITAL

B

RIDGE

3040/V35

(CTS MD-V.35/TCB)

I

NSTALLATION

AND

O

PERATIONS

M

ANUAL

B

An ISO-9001

Certified Company

Copyright© 2000 Patton Electronics Co., All Rights Reserved

June 10, 1997

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Summary of Contents for 3040/V35

Page 1: ...Doc 139001UA Part 07M3040 A DIGITAL BRIDGE 3040 V35 CTS MD V 35 TCB INSTALLATION AND OPERATIONS MANUAL B AnISO 9001 CertifiedCompany Copyright 2000 Patton Electronics Co All Rights Reserved June 10 1997 ...

Page 2: ...hipping container This number may be obtained from Patton Electronics Technical Services at tel 301 975 1007 email support patton com or www http www patton com NOTE Packages received without an RMA number will not be accepted Patton Electronics technical staff is also available to answer any questions that might arise concerning the installation or use of your Patton MSDs Technical Service hours ...

Page 3: ... the Patton devices do cause interference to radio or television reception which can be determined by disconnecting the cables the user is encouraged to try to correct the interference by one or more of the following measures moving the computing equipment away from the receiver re orienting the receiving antenna and or plugging the receiving equipment into a different AC outlet such that the comp...

Page 4: ...e SW15 3 4 2 4 Switch on Data Control SW17 5 6 7 8 2 4 Internal Baud Rates SW15 5 6 7 8 2 4 Fallback Clock Enable SW16 7 2 5 Fallback Clocking From Sub Channel 4 SW16 8 2 5 Fallback Mode Selection SW16 6 2 5 TX Clock Source Selection SW17 1 2 3 2 6 TX Clock Pin Selection SW17 4 2 6 RX Clock Source Selection SW18 4 5 6 2 6 Tail Circuit Buffers SW16 4 2 7 Port DCE DTE Selection SW5 thru SW14 2 7 DTR...

Page 5: ...th and attached equipment Clocking can be derived from the Master Port clock pins Y AA for TT or U W for ETT and V X for RT the internal clock generator or any Sub Channel clock pins Y AA for TT or U W for ETT and V X for RT Fallback Clocking In the event of loss of an externally provided clock or optionally Sub Channel 1 DCD becoming inactive the 3040 V35 CTS MD V 35 TCB has the ability to automa...

Page 6: ... active RTS must become inactive if continuous data transitions have triggered the Anti Stream logic the transitions must stop before the 3040 V35 CTS MD V 35 TCB will clear the Anti Stream logic to that Sub Channel Removing the Sub Channel via the front panel disable switch will not clear the Anti stream logic for a Sub Channel once it has been activated Manual Anti Streaming If manual Anti Strea...

Page 7: ...er Detect if the Sub Port is configured as a DTE or Data Transitions from the attached Sub Channel devices in either configuration The active interface lead RTS or DCD as well as selection of contention mode Data Transitions or Interface Lead activation can be selected on an individual basis for each Sub Channel Once a Sub Channel asserts an active control signal the control signal will be passed ...

Page 8: ...ator intervention to remove an individual Sub Channel from accessing the Master Port Positive latching type switches are provided for each Sub Channel port for isolating or removing a streaming terminal The Sub Channel is activated by pushing the switch until it is in the IN IN IN IN IN position The switch will indicate GREEN in color To disable a Sub Channel push the switch until it locks in the ...

Page 9: ...or until it is firmly seated You may now connect the power cord into your AC outlet Factory Configuration Switch Settings The 3040 V35 CTS MD V 35 TCB is configured prior to shipment with the switches set to the followingdefaultpositions Switch 15 1 2 3 4 and 8 to OFF OFF OFF OFF OFF 5 6 and 7 to ON ON ON ON ON No Data Time Out 2048 bits Internal Baud Rate 56000 Chassis Ground not connected to Sig...

Page 10: ...hes SW5 through SW14 baud rate Jumpers JP4 through JP7 interface Jumpers JP8 through JP12 and configuration switches SW15 through SW18 are located on the PCB as indicated on the strapping guide in the Appendix of this manual After the switch selection activity is completed re install the top cover BEFORE connecting to a AC power source Installation Select an appropriate location accessible to and ...

Page 11: ...low SW16 1 SW16 2 SW16 3 Time ON ON ON No Delay OFF ON ON 1mS ON OFF ON 2mS OFF OFF ON 4mS ON ON OFF 8mS OFF ON OFF 16mS ON OFF OFF 32mS OFF OFF OFF 64mS Anti Streaming SW18 1 2 3 The maximum data block size is user selectable via switch SW18 1 2 and 3 As shown below eight block sizes are provided to the user To disable anti streaming set SW18 8 to the OFF position The maximum block size is normal...

Page 12: ... can resume servicing the other Sub Channels The following table should be used to set this time period SW15 3 SW15 4 CLOCKS ON ON 16 ON OFF 64 OFF ON 256 OFF OFF 2048 Switch on Data Control SW17 5 6 7 8 Each sub channel is independently selectable for switch on data or switch on an active interface control lead Set SW17 pos 5 to OFF OFF OFF OFF OFF if sub channel 1 switch on Data is required Set ...

Page 13: ... of proper operation Fallback Clock Enable SW16 7 If Clock Fallback is required when the primary clock fails set switch SW16 7 to OFF OFF OFF OFF OFF If Fallback is not required set SW16 7 to ON ON ON ON ON The Fallback clock rate is selected with the internal baud rate option When the Fallback is activated the FBC LED will illuminate Fallback Clocking From Sub Channel 4 SW16 8 To use the Sub Chan...

Page 14: ...4 The primary transmit clock can be derived from either pins Y AA or pins U W If pins Y AA are to be the source for primary TX Clock set SW17 4 to ON ON ON ON ON If pins U W are to be the source for primary TX RX Clock set SW17 4 to OFF OFF OFF OFF OFF RX Clock Source Selection SW18 4 5 6 RX Clock Source is selected by SW18 4 5 and 6 The following table indicates the source options provided by the...

Page 15: ...ith the 3040 V35 CTS MD V 35 TCB the modem connected to the Sub Channel should be set to External Transmit Clocking The modem at the remote end of the connection should be set to RX TX Clocking or Slaved TX Clock This will insure the same clock is present throughout the network and clock slippage will not occur Port DCE DTE Selection SW5 thru SW14 Slide switches SW5 through SW14 are used to config...

Page 16: ... DCE installing the forced DTR DSR jumper JP8 JP12 for the appropriate Sub Channel will solve this problem The line is forced to 8V via an 820W resistor providing isolation to any driver that might be on the interface Channel Jumper Channel Jumper Master JP8 3 JP11 1 JP9 4 JP12 2 JP10 FACTORY Test Jumpers JP1 JP2 and JP3 The three test jumpers JP1 2 and 3 must be installed for the unit to properly...

Page 17: ...tion TT Y AA RT V X ETT U V RT V X RT V X TT Y AA RT V X TT Y AA Terminal Buffer Slave TX Clocking ETT U W Slave TX Clocking ETT U W Data Internal TX Clocking Data Data Data Data Data Data External TX Clocking Typical Application Leased or Dial Line Leased or Dial Line V 35 DSU CSU V 35 DSU CSU V 35 3040 V35 3040 V35 V 35 V 35 ...

Page 18: ...rted DB 25 V 35 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Transmit Data B from DTE Receive Data A from DCE Request to Send from DTE Clear To Send from DCE Data Set Ready from DCE Signal Ground common Data Carrier Detect from DCE Transmit Clock A from DCE Receive Clock A from DCE Data Terminal Ready from DTE External Transmit Clock A from DTE External Transmit Clock B from D...

Page 19: ...ection Logic Master Port is a DTE Switch Control Channel Port is a DCE Pins R T RD Pins P S TD Pin C RTS Pin D CTS Pin E DSR Pin F DCD Pin H DTR Pins Y AA TT Pins V X RT Pins U W ETT Master Port is a DTE Pins R T RD Pins P S TD Pins P S TD Pins R T RD Pin C RTS Pin D CTS Pin E DSR Pin F DCD Pin H DTR Pin C RTS Pin D CTS Pin E DSR Pin F DCD Pin H DTR Switch Control Buffer 8v Pins Y AA TT Pins V X R...

Page 20: ...CTS Pin E DSR Pin F DCD Pin H DTR Pins Y AA TT Pins V X RT Pins U W ETT Pins R T RD Pins P S TD Pin C RTS Pin D CTS Pin E DSR Pin F DCD Pin H DTR Pins Y AA TT Pins V X RT Pins U W ETT Clk In Clk Out Master RX Clock Selection Logic Master TX Clock Selection Logic Master Port is a DCE 8v Switch Control Channel Port is a DTE 8v Buffer Pins R T RD Pins P S TD Pin C RTS Pin D CTS Pin E DSR Pin F DCD Pi...

Page 21: ...Service Modes Scanning Mode Channels are continuously scanned for activity on a sequentialbasis Priority Mode Channels are simultaniously monitored channel one has highest access Sub Channel Interface CCITT V 35 female connectors MR 34 Master Interface CCITT V 35 female connector MR 34 DB 25 Front Panel Indicators Power Send Data Receive Data Clock Fallback Sub Channel Active Sub Channel Stream Sw...

Page 22: ...4 4K 9 6K 4 8K 6 ON ON OFF OFF ON ON OFF OFF ON ON OFF OFF ON ON OFF OFF 8 ON ON ON ON ON ON ON ON OFF OFF OFF OFF OFF OFF OFF OFF Count 1024 2048 4096 16K 64K 256K 1M 2M Anti Stream Timer SW18 1 ON OFF ON OFF ON OFF ON OFF 2 ON ON OFF OFF ON ON OFF OFF 3 ON ON ON ON OFF OFF OFF OFF Source Master Chan1 Chan2 Chan3 Chan4 Unused Unused Internal TX Clock Source SW17 1 ON OFF ON OFF ON OFF ON OFF 2 ON...

Page 23: ...B 7622 Rickenbacker Drive Gaithersburg MD 20879 Sales 301 975 1000 Support 301 975 1007 Web Address www patton com ...

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