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Preliminary User's Manual  l  TQMa65xx UM 0001  l  © 2021, TQ-Systems GmbH 

 

Page  9 

 

3.1.2 

Pinout TQMa65xx (continued) 

 

Table 3: 

Pinout TQMa65xx connector X2 

AM65xx  Dir. 

Level 

Group 

Signal 

Pin 

Signal 

Group 

Level 

Dir.  AM65x 

– 

0 V 

Ground 

DGND 

A1 

B1 

DGND 

Ground 

0 V 

– 

AE16 

1.8 / 3.3 V 

RGMII 

PRG2_RGMII1_TD3 

A2 

B2 

PRG2_RGMII2_TD3 

RGMII 

1.8 / 3.3 V 

AD14 

AF16 

1.8 / 3.3 V 

RGMII 

PRG2_RGMII1_TD2 

A3 

B3 

PRG2_RGMII2_TD2 

RGMII 

1.8 / 3.3 V 

AC15 

AG16 

1.8 / 3.3 V 

RGMII 

PRG2_RGMII1_TD1 

A4 

B4 

PRG2_RGMII2_TD1 

RGMII 

1.8 / 3.3 V 

AF14 

AH16 

1.8 / 3.3 V 

RGMII 

PRG2_RGMII1_TD0 

A5 

B5 

PRG2_RGMII2_TD0 

RGMII 

1.8 / 3.3 V 

AD15 

– 

0 V 

Ground 

DGND 

A6 

B6 

DGND 

Ground 

0 V 

– 

AG18 

1.8 / 3.3 V 

RGMII 

PRG2_RGMII1_RD3 

A7 

B7 

PRG2_RGMII2_RD3 

RGMII 

1.8 / 3.3 V 

AH14 

AH17 

1.8 / 3.3 V 

RGMII 

PRG2_RGMII1_RD2 

A8 

B8 

PRG2_RGMII2_RD2 

RGMII 

1.8 / 3.3 V 

AD17 

AE18 

1.8 / 3.3 V 

RGMII 

PRG2_RGMII1_RD1 

A9 

B9 

PRG2_RGMII2_RD1 

RGMII 

1.8 / 3.3 V 

AC16 

AF18 

1.8 / 3.3 V 

RGMII 

PRG2_RGMII1_RD0 

A10  B10 

PRG2_RGMII2_RD0 

RGMII 

1.8 / 3.3 V 

AH15 

– 

0 V 

Ground 

DGND 

A11  B11 

DGND 

Ground 

0 V 

– 

AG17 

1.8 / 3.3 V 

RGMII 

PRG2_RGMII1_RX_CTL 

A12  B12 

PRG2_RGMII2_RX_CTL 

RGMII 

1.8 / 3.3 V 

AG14 

AF17 

1.8 / 3.3 V 

RGMII 

PRG2_RGMII1_RXC 

A13  B13 

PRG2_RGMII2_RXC 

RGMII 

1.8 / 3.3 V 

AG15 

AD16 

I/O 

1.8 / 3.3 V 

RGMII 

PRG2_RGMII1_TXC 

A14  B14 

PRG2_RGMII2_TXC 

RGMII 

1.8 / 3.3 V 

I/O 

AE14 

AE17 

1.8 / 3.3 V 

RGMII 

PRG2_RGMII1_TX_CTL 

A15  B15 

PRG2_RGMII2_TX_CTL 

RGMII 

1.8 / 3.3 V 

AC17 

– 

0 V 

Ground 

DGND 

A16  B16 

DGND 

Ground 

0 V 

– 

AG19 

1.8 / 3.3 V 

RGMII 

PRG1_RGMII2_TD3 

A17  B17 

PRG1_RGMII1_TD3 

RGMII 

1.8 / 3.3 V 

AD19 

AH19 

1.8 / 3.3 V 

RGMII 

PRG1_RGMII2_TD2 

A18  B18 

PRG1_RGMII1_TD2 

RGMII 

1.8 / 3.3 V 

AG20 

AF19 

1.8 / 3.3 V 

RGMII 

PRG1_RGMII2_TD1 

A19  B19 

PRG1_RGMII1_TD1 

RGMII 

1.8 / 3.3 V 

AH21 

AE20 

1.8 / 3.3 V 

RGMII 

PRG1_RGMII2_TD0 

A20  B20 

PRG1_RGMII1_TD0 

RGMII 

1.8 / 3.3 V 

AH20 

– 

0 V 

Ground 

DGND 

A21  B21 

DGND 

Ground 

0 V 

– 

AH22 

1.8 / 3.3 V 

RGMII 

PRG1_RGMII2_RD3 

A22  B22 

PRG1_RGMII1_RD3 

RGMII 

1.8 / 3.3 V 

AD21 

AG21 

1.8 / 3.3 V 

RGMII 

PRG1_RGMII2_RD2 

A23  B23 

PRG1_RGMII1_RD2 

RGMII 

1.8 / 3.3 V 

AF23 

AH23 

1.8 / 3.3 V 

RGMII 

PRG1_RGMII2_RD1 

A24  B24 

PRG1_RGMII1_RD1 

RGMII 

1.8 / 3.3 V 

AG24 

AH24 

1.8 / 3.3 V 

RGMII 

PRG1_RGMII2_RD0 

A25  B25 

PRG1_RGMII1_RD0 

RGMII 

1.8 / 3.3 V 

AE22 

– 

0 V 

Ground 

DGND 

A26  B26 

DGND 

Ground 

0 V 

– 

AE21 

1.8 / 3.3 V 

RGMII 

PRG1_RGMII2_RX_CTL 

A27  B27 

PRG1_RGMII1_RX_CTL 

RGMII 

1.8 / 3.3 V 

AG23 

AG22 

1.8 / 3.3 V 

RGMII 

PRG1_RGMII2_RXC 

A28  B28 

PRG1_RGMII1_RXC 

RGMII 

1.8 / 3.3 V 

AF22 

AE19 

I/O 

1.8 / 3.3 V 

RGMII 

PRG1_RGMII2_TXC 

A29  B29 

PRG1_RGMII1_TXC 

RGMII 

1.8 / 3.3 V 

I/O 

AD20 

AC20 

1.8 / 3.3 V 

RGMII 

PRG1_RGMII2_TX_CTL 

A30  B30 

PRG1_RGMII1_TX_CTL 

RGMII 

1.8 / 3.3 V 

AF21 

– 

0 V 

Ground 

DGND 

A31  B31 

DGND 

Ground 

0 V 

– 

AE27 

1.8 / 3.3 V 

RGMII 

PRG0_RGMII2_TD3 

A32  B32 

PRG0_RGMII1_TD3 

RGMII 

1.8 / 3.3 V 

AA24 

AD24 

1.8 / 3.3 V 

RGMII 

PRG0_RGMII2_TD2 

A33  B33 

PRG0_RGMII1_TD2 

RGMII 

1.8 / 3.3 V 

AD26 

AD25 

1.8 / 3.3 V 

RGMII 

PRG0_RGMII2_TD1 

A34  B34 

PRG0_RGMII1_TD1 

RGMII 

1.8 / 3.3 V 

AC26 

AC25 

1.8 / 3.3 V 

RGMII 

PRG0_RGMII2_TD0 

A35  B35 

PRG0_RGMII1_TD0 

RGMII 

1.8 / 3.3 V 

AD27 

– 

0 V 

Ground 

DGND 

A36  B36 

DGND 

Ground 

0 V 

– 

AB26 

1.8 / 3.3 V 

RGMII 

PRG0_RGMII2_RD3 

A37  B37 

PRG0_RGMII1_RD3 

RGMII 

1.8 / 3.3 V 

AA27 

AC27 

1.8 / 3.3 V 

RGMII 

PRG0_RGMII2_RD2 

A38  B38 

PRG0_RGMII1_RD2 

RGMII 

1.8 / 3.3 V 

W24 

AC28 

1.8 / 3.3 V 

RGMII 

PRG0_RGMII2_RD1 

A39  B39 

PRG0_RGMII1_RD1 

RGMII 

1.8 / 3.3 V 

W25 

AB28 

1.8 / 3.3 V 

RGMII 

PRG0_RGMII2_RD0 

A40  B40 

PRG0_RGMII1_RD0 

RGMII 

1.8 / 3.3 V 

V24 

– 

0 V 

Ground 

DGND 

A41  B41 

DGND 

Ground 

0 V 

– 

AA25 

1.8 / 3.3 V 

RGMII 

PRG0_RGMII2_RX_CTL 

A42  B42 

PRG0_RGMII1_RX_CTL 

RGMII 

1.8 / 3.3 V 

Y24 

AB27 

1.8 / 3.3 V 

RGMII 

PRG0_RGMII2_RXC 

A43  B43 

PRG0_RGMII1_RXC 

RGMII 

1.8 / 3.3 V 

Y25 

AC24 

I/O 

1.8 / 3.3 V 

RGMII 

PRG0_RGMII2_TXC 

A44  B44 

PRG0_RGMII1_TXC 

RGMII 

1.8 / 3.3 V 

I/O 

AD28 

AB24 

1.8 / 3.3 V 

RGMII 

PRG0_RGMII2_TX_CTL 

A45  B45 

PRG0_RGMII1_TX_CTL 

RGMII 

1.8 / 3.3 V 

AB25 

– 

0 V 

Ground 

DGND 

A46  B46 

DGND 

Ground 

0 V 

– 

AH18 

1.8 / 3.3 V 

RGMII 

PRG1_MDIO0_MDC 

A47  B47 

GPIO1_37 

GPIO 

1.8 / 3.3 V 

I/O 

V27 

AD18 

I/O 

1.8 / 3.3 V 

RGMII 

PRG1_MDIO0_MDIO 

A48  B48 

PRG0_PRU0_GPO5 

GPIO 

1.8 / 3.3 V 

I/O 

V28 

– 

0 V 

Ground 

DGND 

A49  B49 

VOUT_DE 

GPMC 

1.8 / 3.3 V 

T23 

AE15 

1.8 / 3.3 V 

RGMII 

PRG2_MDIO0_MDC 

A50  B50 

VOUT_PCLK 

GPMC 

1.8 / 3.3 V 

R24 

– 

0 V 

Ground 

DGND 

A51  B51 

DGND 

Ground 

0 V 

– 

AC19 

I/O 

1.8 / 3.3 V 

RGMII 

PRG2_MDIO0_MDIO 

A52  B52 

VOUT_HSYNC 

GPMC 

1.8 / 3.3 V 

T24 

– 

0 V 

Ground 

DGND 

A53  B53 

VOUT_VSYNC 

GPMC 

1.8 / 3.3 V 

T25 

AE28 

1.8 / 3.3 V 

RGMII 

PRG0_MDIO0_MDC 

A54  B54 

VOUT_DATA23 

GPMC 

1.8 / 3.3 V 

R23 

AE26 

I/O 

1.8 / 3.3 V 

RGMII 

PRG0_MDIO0_MDIO 

A55  B55 

VOUT_DATA22 

GPMC 

1.8 / 3.3 V 

R26 

 

Summary of Contents for TQMa65 Series

Page 1: ...TQMa65xx Preliminary User s Manual TQMa65xx UM 0001 07 02 2021 ...

Page 2: ...CU Boot Mode Selection 13 3 2 1 3 Boot Mode pin mapping 14 3 2 2 Memory 16 3 2 2 1 DDR4 SDRAM 16 3 2 2 2 eMMC 16 3 2 2 3 OSPI NOR flash 17 3 2 2 4 EEPROM 17 3 2 2 5 EEPROM with temperature sensor 18 3 2 3 RTC 19 3 2 4 Secure Element 19 3 2 5 I2 C devices 20 3 2 6 Board Controller 20 3 2 7 Reset 20 3 3 Power 21 3 3 1 Power supply 21 3 3 2 TQMa65xx power up sequencing 21 3 3 3 Power consumption 21 3...

Page 3: ...2021 TQ Systems GmbH Page ii TABLE OF CONTENTS continued 7 ENVIRONMENT PROTECTION 29 7 1 RoHS 29 7 2 WEEE 29 7 3 REACH 29 7 4 EuP 29 7 5 Battery 29 7 6 Packaging 29 7 7 Other entries 29 8 APPENDIX 30 8 1 Acronyms and definitions 30 8 2 References 32 ...

Page 4: ...9 Carrier board mating connectors 22 Table 20 TQMa65xx heights 23 Table 21 Labels on TQMa65xx 25 Table 22 Shock resistance 27 Table 23 Vibration resistance 27 Table 24 Climate and operational conditions 25 C to 85 C 28 Table 25 Climate and operational conditions 40 C to 85 C 28 Table 26 Acronyms 30 Table 27 Further applicable documents 32 ILLUSTRATION DIRECTORY Figure 1 Block diagram AM65xx CPU fa...

Page 5: ...Preliminary User s Manual l TQMa65xx UM 0001 l 2021 TQ Systems GmbH Page iv REVISION HISTORY Rev Date Name Pos Modification 0001 07 02 2021 Petz Initial release ...

Page 6: ... brand and trademarks are rightly protected by a third party 1 3 Disclaimer TQ Systems GmbH does not guarantee that the information in this Preliminary User s Manual is up to date correct complete or of good quality Nor does TQ Systems GmbH assume guarantee for further usage of the information Liability claims against TQ Systems GmbH referring to material or non material related damages caused due...

Page 7: ...important details or aspects for working with TQ products Command A font with fixed width is used to denote commands contents file names or menu items 1 7 Handling and ESD tips General handling of your TQ products The TQ product may only be used and serviced by certified personnel who have taken note of the information the safety regulations in this document and all related rules and regulations A...

Page 8: ...e manufacturer s specifications of the components used for example CompactFlash cards are to be taken note of They contain if applicable additional information that must be taken note of for safe and reliable operation These documents are stored at TQ Systems GmbH Chip errata It is the user s responsibility to make sure all errata published by the manufacturer of each component are taken note of T...

Page 9: ...xx extends the TQ Systems GmbH product range and offers an outstanding computing performance A suitable AM65xx derivative AM6526 AM6527 AM6528 AM6546 or AM6548 can be selected for each requirement All essential CPU signals are routed to the connectors There are therefore no restrictions for customers using the TQMa65xx with respect to an integrated customised design All essential components like C...

Page 10: ...ents 2 2 Key functions and characteristics The following components are implemented on the TQMa65xx AM6526 AM6527 AM6528 AM6546 or AM6548 DDR4 SDRAM eMMC NAND flash OSPI NOR flash EEPROM EEPROM Temperature sensor RTC Reset structure Power supply with Power Sequencing single 5 V supply Voltage monitoring Boot configuration Three connectors 2 220 pins 1 120 pins ...

Page 11: ...ration TI Pin Mux Tool The pin assignment listed in Table 2 to Table 4 refers to the corresponding BSP provided by TQ Systems in combination with the MBa65xx The electrical and pin characteristics are to be taken from the AM65xx Data Sheet 1 and the AM65xx Reference Manual 2 Attention Destruction or malfunction AM65xx pin multiplexing TQMa65xx reserved pins Depending on the configuration many AM65...

Page 12: ...8 V SERDES SERDES1_RXP A29 B29 SWD_CLK Factory Test 3 3 V I AG9 I 1 8 V SERDES SERDES1_RXN A30 B30 SWD_DIO Factory Test 3 3 V I O P 0 V Ground DGND A31 B31 DGND Ground 0 V P AH9 O 1 8 V SERDES SERDES1_TXN_C A32 B32 DGND Ground 0 V P AG8 O 1 8 V SERDES SERDES1_TXP_C A33 B33 SERDES0_PCIe_REFCLK0P SERDES 1 8 V O AF10 P 0 V Ground DGND A34 B34 SERDES0_PCIe_REFCLK0N SERDES 1 8 V O AF9 AE9 O 1 8 V SERDE...

Page 13: ..._GPIO0_32 A81 B81 DGND Ground 0 V P P1 I O 1 8 3 3 V GPIO WKUP_GPIO0_31 A82 B82 MCU_POR _OUT SYSTEM 1 8 3 3 V O V2 P3 I O 1 8 3 3 V GPIO WKUP_GPIO0_28 A83 B83 MCU_WARM_RESET _OUT SYSTEM 1 8 3 3 V O V3 P2 I O 1 8 3 3 V GPIO WKUP_GPIO0_27 A84 B84 DGND Ground 0 V P R1 I O 1 8 3 3 V GPIO WKUP_GPIO0_26 A85 B85 MCU_RESET _MB SYSTEM 1 8 3 3 V I W4 T1 I O 1 8 3 3 V GPIO WKUP_GPIO0_25 A86 B86 MCU_SAFETY_ER...

Page 14: ...25 PRG1_RGMII1_RD0 RGMII 1 8 3 3 V I AE22 P 0 V Ground DGND A26 B26 DGND Ground 0 V P AE21 I 1 8 3 3 V RGMII PRG1_RGMII2_RX_CTL A27 B27 PRG1_RGMII1_RX_CTL RGMII 1 8 3 3 V I AG23 AG22 I 1 8 3 3 V RGMII PRG1_RGMII2_RXC A28 B28 PRG1_RGMII1_RXC RGMII 1 8 3 3 V I AF22 AE19 I O 1 8 3 3 V RGMII PRG1_RGMII2_TXC A29 B29 PRG1_RGMII1_TXC RGMII 1 8 3 3 V I O AD20 AC20 O 1 8 3 3 V RGMII PRG1_RGMII2_TX_CTL A30 ...

Page 15: ...3 V GPIO GPIO1_58 A79 B79 VOUT_DATA0 GPMC 1 8 3 3 V O M27 P 0 V Ground DGND A80 B80 DGND Ground 0 V P W26 I O 1 8 3 3 V GPIO GPIO1_68 A81 B81 DGND Ground 0 V P W28 I O 1 8 3 3 V GPIO GPIO1_56 A82 B82 I2C2_SCL I2C 1 8 3 3 V I O D T27 W27 I O 1 8 3 3 V GPIO GPIO1_57 A83 B83 I2C2_SDA I2C 1 8 3 3 V I O D R25 V26 I O 1 8 3 3 V GPIO GPIO1_38 A84 B84 DGND Ground 0 V P U27 I O 1 8 3 3 V GPIO GPIO1_36 A85 ...

Page 16: ...B27 SE_ISO_7816_IO1 SECURITY 3 3 V I O NC NC A28 B28 SE_ISO_7816_IO2 SECURITY 3 3 V I O NC NC A29 B29 SE_ISO_14443_LA SECURITY I O NC NC A30 B30 SE_ISO_14443_LB SECURITY I O NC NC A31 B31 SE_ISO_7816_RST SECURITY 3 3 V I NC NC A32 B32 DGND Ground 0 V P NC NC A33 B33 SE_ISO_7816_CLK SECURITY 3 3 V I NC NC A34 B34 DGND Ground 0 V P P 0 V Ground DGND A35 B35 DGND Ground 0 V P B25 O 1 8 3 3 V MMC SD e...

Page 17: ...e configuration of the AM65xx is selected via boot strapping pins when the reset is released At this time the correct levels must be applied to the corresponding AM65XX pins to ensure the desired configuration More information about boot interfaces and its configuration is to be taken from the AM65xx Data Sheet 1 and the AM65xx Reference Manual 2 Standard boot devices are e g the eMMC or the QSPI ...

Page 18: ...9 2 0 0 1 20 0 1 0 24 0 1 1 25 1 0 0 26 1 0 1 27 1 1 0 Reserved 1 1 1 No PLL configuration slow speed backup Table 7 POST Selection MCU_BOOTMODE Pins POST Select 8 7 6 5 0 0 0 0 POST bypass X X X 1 Enable POST DMSC MCU LBIST Parallel X X 1 X POST DMSC LBIST Enable X 1 X X POST MCU LBIST Enable 1 X X X POST PBIST Enable Table 8 1 8V LDO Configuration MCU_BOOTMODE Pin 1 8V MMC SD 9 0 MMCSD0 connecte...

Page 19: ... debug mode 0 0 0 1 OSPI 0 0 1 0 QSPI 0 0 1 1 Hyperflash 0 1 0 0 SPI on QSPI OSPI port 0 in legacy SPI mode 0 1 0 1 I2 C 0 1 1 0 MMC SD card eMMC boot from UDA or file system 0 1 1 1 Ethernet 1 0 0 0 USB 1 0 0 1 PCIe 1 0 1 0 UART 1 0 1 1 Reserved 1 1 0 0 GPMC NOR 1 1 0 1 eMMC boot from boot partition with auto fall back to file system 1 1 1 0 Reserved acts as Sleep 1 1 1 1 Reserved acts as Sleep T...

Page 20: ...h 0010 QSPI ns Csel Speed 0011 Hyperflash Port Mode Csel Read Cmd Addr Width 0100 SPI Bus Reset Mode Speed Addr 0101 I2C Volt Port Interface Config 1bit 0110 MMC SD Clken Clkf Interface Speed Duplex Extern conf 0111 Ethernet Mode Port 1000 USB Port Dual Sref 1001 PCIe 1010 UART Base A D mux Csel Size Csel Bus Width 1100 GPMC NOR Port Alt Bus Width Speed Ack 1101 eMMC Table 14 Backup Boot Mode Conf...

Page 21: ...ctors The eMMC on the TQMa65xx is connected with 8 bit to MMCSD0 and meets eMMC standard v5 1 Up to 64 Gbyte eMMC can be assembled on the TQMa65xx Please note that HS400 is not possible on account of a CPU erratum MMCSD1 with 4 bit is intended for the SD card interface Devices which meet SD 4 10 or SDIO 4 0 can be connected on the carrier board if the eMMC on the TQMa65xx is not assembled Figure 3...

Page 22: ...ailable at TQMa65xx connectors o Single Die NOR assembled on TQMa65xx OSPI1 is available at TQMa65xx connectors Figure 4 Block diagram OSPI interface Attention Malfunction or destruction OSPI interface The OSPI interface may only be used as memory interface Other SPI devices have to be connected at the MCSPI interfaces 3 2 2 4 EEPROM A 64 Kbit serial EEPROM type 24LC64T controlled by the WKUP_I2C ...

Page 23: ...cted and can be used for general data storage The EEPROM also provides a temperature sensor to monitor the temperature of the TQMa65xx Figure 6 Block diagram temperature sensor interface The device has the following I2 C addresses o EEPROM Normal Mode 0x57 101 0111b o EEPROM Protected Mode 0x37 011 0111b o Temperature sensor 0x1F 001 1111b The EEPROM with temperature sensor D4 is assembled next to...

Page 24: ...25 C This equals to a deviation of 1 7 s day or 30 ppm 85 C 2 6 s day The RTC is connected to the WKUP_I2C bus Interrupt Signal RTC_INT is connected to the TQMa65xx Board Controller The RTC can be supplied at pin V_BAT X1 B19 V_BAT has to be between 0 9 V and 3 6 V Figure 7 Block diagram RTC The RTC has I2 C address 0x51 101 0001b 3 2 4 Secure Element An optional Secure Element type SE050 can be a...

Page 25: ...0x60 110 0000b Should not be altered If more I2 C devices are connected to the WKUP_I2C bus on the carrier board the maximum capacitive bus load according to the I2 C standard must be observed If necessary additional Pull Ups have to be provided on the carrier board 3 2 6 Board Controller The following housekeeping functions are handled by the Board Controller on the TQMa65xx Voltage supervision P...

Page 26: ...ance of the maximum permitted input voltage A too high input voltage can lead to malfunctions premature aging or destruction of the TQMa65xx 3 3 2 TQMa65xx power up sequencing The power up sequencing is carried out and monitored independently by the TQMa65xx During power up the POR is held low The power up sequence is controlled by the Board Controller Attention Cross supply during power up To avo...

Page 27: ...l MOZIa65 is strongly recommended Note Component placement on carrier board 2 5 mm should be kept free on the carrier board on both long sides of the TQMa65xx for the extraction tool MOZIa65 The following table shows some suitable mating connectors for the carrier board Table 19 Carrier board mating connectors Manufacturer Part number Remark Stack height EPT 2 220 pin 401 51101 51 1 120 pin 401 51...

Page 28: ... 2 7 mm Figure 10 TQMa65xx dimensions side view Table 20 TQMa65xx heights 4 Dimension Value mm Remark A 5 10 0 07 Board to Board distance B 1 72 0 17 PCB thickness C 1 53 0 15 AM65xx height C1 2 95 0 10 Inductor highest component D 3 16 0 12 Free space under TQMa65xx E 8 37 0 24 Height to AM65xx surface not highest component A 3D STEP model is available on request Please contact TQ Support 4 Stati...

Page 29: ...Preliminary User s Manual l TQMa65xx UM 0001 l 2021 TQ Systems GmbH Page 24 4 2 Dimensions continued Figure 11 TQMa65xx CPU position top view Figure 12 TQMa65xx dimensions top view through TQMa65xx ...

Page 30: ...nt placement Figure 13 TQMa65xx component placement top The labels on the TQMa65xx show the following information Table 21 Labels on TQMa65xx Label Content AK1 Serial number AK2 TQMa65xx version and revision AK3 MAC address AK4 Tests performed Figure 14 TQMa65xx component placement bottom ...

Page 31: ...e highest component Inadequate cooling connections can lead to overheating of the TQMa65xx and thus malfunction deterioration or destruction 4 6 Structural requirements The TQMa65xx is held in the mating connectors by the retention force of the pins 560 For high requirements with respect to vibration and shock firmness an additional fastening has to be provided in the final product to keep the TQM...

Page 32: ...it in the system the protection against electrostatic discharge should be provided directly at the inputs of a system As these measures always have to be implemented on the carrier board no special protective measures were provided on the TQMa65xx The following measures are recommended for a carrier board Generally applicable Shielding of inputs shielding connected well to ground housing on both e...

Page 33: ... C Relative humidity operating storage 10 to 90 Not condensing For consumer applications a version specified for a temperature range of 0 C to 90 C can be provided on request Detailed information concerning the thermal characteristics of the AM65xx is to be taken from the TI documents 1 and 2 Attention Destruction or malfunction TQMa65xx heat dissipation The TQMa65xx belongs to a performance categ...

Page 34: ...ssembled on the TQMa65xx 7 6 Packaging By environmentally friendly processes production equipment and products we contribute to the protection of our environment To be able to reuse the TQMa65xx it is produced in such a way a modular construction that it can be easily repaired and disassembled The energy consumption of this subassembly is minimised by suitable measures The TQMa65xx is delivered in...

Page 35: ...ory EMC Electromagnetic Compatibility eMMC embedded Multimedia Card EN Europäische Norm European Standard ESD Electro Static Discharge EuP Energy using Products FR 4 Flame Retardant 4 GPIO General Purpose Input Output GPMC General Purpose Memory Controller GPU Graphics Processor Unit I2 C Inter Integrated Circuit IC Integrated Circuit IEEE Institute of Electrical and Electronics Engineers IP00 Ing...

Page 36: ...ad Serial Peripheral Interface REACH Registration Evaluation Authorisation and restriction of Chemicals RGMII Reduced Gigabit Media Independent Interface RoHS Restriction of the use of certain Hazardous Substances ROM Read Only Memory RTC Real Time Clock RWP Reversible Write Protected SDRAM Synchronous Dynamic Random Access Memory SPI Serial Peripheral Interface STEP Standard for Exchange of Produ...

Page 37: ...ical Reference Manual Rev 1 1 06 2019 TI 2 AM65x AM652x Sitara Processors Datasheet Rev 1 06 2019 TI 3 AM65x DRA80xM Processors Silicon Errata Rev 02 2019 TI 4 MKL04Z16 Reference Manual Rev 3 1 11 2012 NXP 5 PCF85063A RTC Rev 7 23 01 2018 NXP 6 PROC062_REV E2_SCH Reference Manual Rev 1 0 04 09 2018 TI 7 MBa65xx User s Manual current TQ Systems 8 TQMa65xx Support Wiki current TQ Systems ...

Page 38: ...TQ Systems GmbH Mühlstraße 2 l Gut Delling l 82229 Seefeld Info TQ Group TQ Group ...

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