TPG CA-203A, Operating Manual

Page: 55 / 109

Warranty Card
- 104 -
When F9.05 is set to 1:
START T1-T2-T3-T4
ADDR 01H
CMD 03H
Byte number 04H
Data address 0001H high-order 13H
Data address 0001H low-order 88H
Data address 0002H high-order 00H
Data address 0002H low-order 00H
CRC CHK low-order
CRC CHK high-order
CRC check value
END T1-T2-T3-T4
ASCII master command information
START
‘:’
‘0’
ADDR
‘1’
‘0’
CMD
‘3’
‘0’
Start address high-
order
‘0’
‘0’
Start address
low
-order
‘4’
‘0’
Data number high-
order
‘0’
‘0’
Data number low-order
‘2’
LRC CHK Hi
‘F’
LRC CHK Lo
‘6’
END Hi CR
END Lo LF
ASCII slave responding information
START
‘:’
‘0’
ADDR
‘1’
‘0’
CMD
‘3’
‘0’
Byte numb
e
r
‘4’
‘1’
Data address 0004H
high-order
‘3’
Warranty Card
- 105 -
‘8’
Data address 0004H
low-order
‘8’
‘1’
Data address
0005H
high-order
‘3’
‘8’
Data address 0005H low-
order
‘8’
LRC CHK Hi
‘C’
LRC CHK Lo
‘2’
END Hi CR
END Lo LF
Parity mode - CRC mode: CRC (Cyclical Redundancy Check)
Use RTU frame format, the message includes error check field based on the CRC
method. The CRC field checks the whole content of message. The CRC field has two
bytes containing a 16-bit binary value. The CRC value calculated by the transmitting
device will be added into to the message. The receiving device recalculates the value of
the received CRC, and compares the calculated value to the actual value of the received
CRC field, if the two values are not equal,then there is an error in the transmission.
The CRC firstly stores 0xFFFF and then calls for a process to deal with the
successive eight-bit bytes in message and the value of the current register. Only the 8-bit
data in each character is valid to the CRC,the start bit and stop bit, and parity bit are
invalid. During generation of the CRC, each eight-bit character is exclusive OR (XOR)
with the register contents separately, the result moves to the direction of least significant
bit (LSB), and the most significant bit (MSB) is filled with 0. LSB will be picked up for
detection, if LSB is 1, the register will be XOR with the preset value separately, if LSB
is 0, then no XOR takes place. The whole process is repeated eight times. After the last
bit (eighth) is completed, the next
eight-bit byte will be XOR with the register's current value separately again. The final
value of the register is the CRC value that all the bytes of the message have been
applied.
When the CRC is appended to the message, the low byte is appended firstly,
followed by the high byte. CRC simple functions is as follows:
unsigned int crc_chk_value
（
unsigned char *data_value,unsigned char length
）